From e3a880051ccf1ba9a16fd9cf031b7386b2533bf1 Mon Sep 17 00:00:00 2001
From: sowgro <tpoke.ferrari@gmail.com>
Date: Tue, 2 Sep 2025 14:45:40 -0400
Subject: Organized project

---
 project/.cproject                            |   41 +-
 project/.settings/language.settings.xml      |    4 +-
 project/Core/Inc/Devices/GPIO.h              |   18 +
 project/Core/Inc/Devices/LED.h               |   12 +
 project/Core/Inc/Devices/UART.h              |   18 +
 project/Core/Inc/Devices/adc.h               |   19 +
 project/Core/Inc/Devices/dac.h               |   19 +
 project/Core/Inc/GPIO.h                      |   18 -
 project/Core/Inc/LED.h                       |   12 -
 project/Core/Inc/Project/project.h           |   13 +
 project/Core/Inc/Project/song.h              |   23 +
 project/Core/Inc/Project/tone.h              |   49 +
 project/Core/Inc/SysClock.h                  |   11 -
 project/Core/Inc/System/SysClock.h           |   11 +
 project/Core/Inc/System/error_handler.h      |    6 +
 project/Core/Inc/System/stm32l4xx_hal_conf.h |  483 +++++++
 project/Core/Inc/System/stm32l4xx_it.h       |   69 +
 project/Core/Inc/System/systick.h            |   17 +
 project/Core/Inc/UART.h                      |   18 -
 project/Core/Inc/adc.h                       |   19 -
 project/Core/Inc/dac.h                       |   19 -
 project/Core/Inc/error_handler.h             |    6 -
 project/Core/Inc/project.h                   |   13 -
 project/Core/Inc/song.h                      |   23 -
 project/Core/Inc/stm32l4xx_hal_conf.h        |  483 -------
 project/Core/Inc/stm32l4xx_it.h              |   69 -
 project/Core/Inc/systick.h                   |   17 -
 project/Core/Inc/tone.h                      |   49 -
 project/Core/Src/Devices/GPIO.c              |   50 +
 project/Core/Src/Devices/LED.c               |   49 +
 project/Core/Src/Devices/UART.c              |  152 +++
 project/Core/Src/Devices/adc.c               |  130 ++
 project/Core/Src/Devices/dac.c               |   83 ++
 project/Core/Src/GPIO.c                      |   50 -
 project/Core/Src/LED.c                       |   49 -
 project/Core/Src/Project/project.c           |    8 +
 project/Core/Src/Project/song.c              | 1774 ++++++++++++++++++++++++++
 project/Core/Src/Project/tone.c              |   83 ++
 project/Core/Src/SysClock.c                  |  103 --
 project/Core/Src/System/SysClock.c           |  103 ++
 project/Core/Src/System/error_handler.c      |    9 +
 project/Core/Src/System/syscalls.c           |  159 +++
 project/Core/Src/System/sysmem.c             |   80 ++
 project/Core/Src/System/system_stm32l4xx.c   |  337 +++++
 project/Core/Src/System/systick.c            |   23 +
 project/Core/Src/UART.c                      |  152 ---
 project/Core/Src/adc.c                       |  130 --
 project/Core/Src/dac.c                       |   83 --
 project/Core/Src/error_handler.c             |    9 -
 project/Core/Src/project.c                   |    8 -
 project/Core/Src/song.c                      | 1774 --------------------------
 project/Core/Src/syscalls.c                  |  159 ---
 project/Core/Src/sysmem.c                    |   80 --
 project/Core/Src/system_stm32l4xx.c          |  337 -----
 project/Core/Src/systick.c                   |   23 -
 project/Core/Src/tone.c                      |   83 --
 56 files changed, 3822 insertions(+), 3817 deletions(-)
 create mode 100644 project/Core/Inc/Devices/GPIO.h
 create mode 100644 project/Core/Inc/Devices/LED.h
 create mode 100644 project/Core/Inc/Devices/UART.h
 create mode 100644 project/Core/Inc/Devices/adc.h
 create mode 100644 project/Core/Inc/Devices/dac.h
 delete mode 100644 project/Core/Inc/GPIO.h
 delete mode 100644 project/Core/Inc/LED.h
 create mode 100644 project/Core/Inc/Project/project.h
 create mode 100644 project/Core/Inc/Project/song.h
 create mode 100644 project/Core/Inc/Project/tone.h
 delete mode 100644 project/Core/Inc/SysClock.h
 create mode 100644 project/Core/Inc/System/SysClock.h
 create mode 100644 project/Core/Inc/System/error_handler.h
 create mode 100644 project/Core/Inc/System/stm32l4xx_hal_conf.h
 create mode 100644 project/Core/Inc/System/stm32l4xx_it.h
 create mode 100644 project/Core/Inc/System/systick.h
 delete mode 100644 project/Core/Inc/UART.h
 delete mode 100644 project/Core/Inc/adc.h
 delete mode 100644 project/Core/Inc/dac.h
 delete mode 100644 project/Core/Inc/error_handler.h
 delete mode 100644 project/Core/Inc/project.h
 delete mode 100644 project/Core/Inc/song.h
 delete mode 100644 project/Core/Inc/stm32l4xx_hal_conf.h
 delete mode 100644 project/Core/Inc/stm32l4xx_it.h
 delete mode 100644 project/Core/Inc/systick.h
 delete mode 100644 project/Core/Inc/tone.h
 create mode 100644 project/Core/Src/Devices/GPIO.c
 create mode 100644 project/Core/Src/Devices/LED.c
 create mode 100644 project/Core/Src/Devices/UART.c
 create mode 100644 project/Core/Src/Devices/adc.c
 create mode 100644 project/Core/Src/Devices/dac.c
 delete mode 100644 project/Core/Src/GPIO.c
 delete mode 100644 project/Core/Src/LED.c
 create mode 100644 project/Core/Src/Project/project.c
 create mode 100644 project/Core/Src/Project/song.c
 create mode 100644 project/Core/Src/Project/tone.c
 delete mode 100644 project/Core/Src/SysClock.c
 create mode 100644 project/Core/Src/System/SysClock.c
 create mode 100644 project/Core/Src/System/error_handler.c
 create mode 100644 project/Core/Src/System/syscalls.c
 create mode 100644 project/Core/Src/System/sysmem.c
 create mode 100644 project/Core/Src/System/system_stm32l4xx.c
 create mode 100644 project/Core/Src/System/systick.c
 delete mode 100644 project/Core/Src/UART.c
 delete mode 100644 project/Core/Src/adc.c
 delete mode 100644 project/Core/Src/dac.c
 delete mode 100644 project/Core/Src/error_handler.c
 delete mode 100644 project/Core/Src/project.c
 delete mode 100644 project/Core/Src/song.c
 delete mode 100644 project/Core/Src/syscalls.c
 delete mode 100644 project/Core/Src/sysmem.c
 delete mode 100644 project/Core/Src/system_stm32l4xx.c
 delete mode 100644 project/Core/Src/systick.c
 delete mode 100644 project/Core/Src/tone.c

diff --git a/project/.cproject b/project/.cproject
index 80a8aac..807e262 100644
--- a/project/.cproject
+++ b/project/.cproject
@@ -24,7 +24,7 @@
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1438434567" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.851610351" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-L476RG" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1722823564" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-L476RG || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32L4xx/Include | ../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32L476xx ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.897019655" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="80" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.897019655" name="Cpu clock frequence" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="80" valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.2208393" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
 							<builder buildPath="${workspace_loc:/project}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1651758985" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1964825041" name="MCU/MPU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
@@ -44,6 +44,10 @@
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1390171442" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../Core/Inc/Devices"/>
+									<listOptionValue builtIn="false" value="../Core/Inc/System"/>
+									<listOptionValue builtIn="false" value="../Core/Inc/Project"/>
+									<listOptionValue builtIn="false" value="../Core/Inc/Activites"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32L4xx/Include"/>
@@ -97,28 +101,28 @@
 				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2058685935" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
 					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2058685935." name="/" resourcePath="">
 						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.396091447" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1379501988" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32L476RGTx" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1830312712" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2058878475" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.822104054" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1216441602" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.565119901" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-L476RG" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.928299502" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-L476RG || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32L4xx/Include | ../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32L476xx ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.71805622" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="80" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1379501988" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32L476RGTx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1830312712" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2058878475" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.822104054" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1216441602" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.565119901" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-L476RG" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.928299502" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-L476RG || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc | ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32L4xx/Include | ../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32L476xx ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.71805622" name="Cpu clock frequence" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="80" valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1016181502" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
-							<builder buildPath="${workspace_loc:/project}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1398529013" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<builder buildPath="${workspace_loc:/project}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1398529013" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.697070165" name="MCU/MPU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.215424692" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.215424692" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1072529547" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.701438067" name="MCU/MPU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1024784664" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.468358880" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
-								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.979629222" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1024784664" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.468358880" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.979629222" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
 									<listOptionValue builtIn="false" value="STM32L476xx"/>
 								</option>
-								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.498921204" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.498921204" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy"/>
@@ -128,11 +132,11 @@
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1352590245" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1133825530" name="MCU/MPU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1887336043" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.169583738" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1887336043" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.169583738" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1929883765" name="MCU/MPU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.605262873" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld}" valueType="string"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.605262873" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32L476RGTX_FLASH.ld}" valueType="string"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.160757093" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
 									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
 									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@@ -173,4 +177,5 @@
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
 	</storageModule>
+	<storageModule moduleId="refreshScope"/>
 </cproject>
\ No newline at end of file
diff --git a/project/.settings/language.settings.xml b/project/.settings/language.settings.xml
index 974b8a7..ae082b2 100644
--- a/project/.settings/language.settings.xml
+++ b/project/.settings/language.settings.xml
@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-905336628230113484" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="781097053452714720" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -16,7 +16,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-905336628230113484" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="781097053452714720" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
diff --git a/project/Core/Inc/Devices/GPIO.h b/project/Core/Inc/Devices/GPIO.h
new file mode 100644
index 0000000..cb602d8
--- /dev/null
+++ b/project/Core/Inc/Devices/GPIO.h
@@ -0,0 +1,18 @@
+/*
+ * gpio.h
+ *
+ *  Created on: Nov 4, 2021
+ *      Author: Mitesh Parikh
+ */
+
+#ifndef INC_GPIO_H_
+#define INC_GPIO_H_
+
+#include "main.h"
+
+#define S1_Pin GPIO_PIN_9
+#define S1_GPIO_Port GPIOA
+
+void GPIO_Init(void);
+
+#endif /* INC_GPIO_H_ */
diff --git a/project/Core/Inc/Devices/LED.h b/project/Core/Inc/Devices/LED.h
new file mode 100644
index 0000000..464b56b
--- /dev/null
+++ b/project/Core/Inc/Devices/LED.h
@@ -0,0 +1,12 @@
+#ifndef __NUCLEO476_LED_H
+#define __NUCLEO476_LED_H
+
+#include "stm32l476xx.h"
+
+void LED_Init(void);
+
+void LED_Off(void);
+void LED_On(void);
+void LED_Toggle(void);
+
+#endif /* __NUCLEO476_LED_H */
diff --git a/project/Core/Inc/Devices/UART.h b/project/Core/Inc/Devices/UART.h
new file mode 100644
index 0000000..e9c0f33
--- /dev/null
+++ b/project/Core/Inc/Devices/UART.h
@@ -0,0 +1,18 @@
+#ifndef __NUCLEO476_UART_H
+#define __NUCLEO476_UART_H
+
+#include "stm32l476xx.h"
+
+#define BUFFER_SIZE (32)
+
+void UART2_Init(void);
+void UART2_GPIO_Init(void);
+void USART1_IRQHandler(void);
+void USART2_IRQHandler(void);
+void USART_Init(USART_TypeDef * USARTx);
+void USART_Write(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t nBytes);
+uint8_t   USART_Read(USART_TypeDef * USARTx);
+void USART_Delay(uint32_t us);
+void USART_IRQHandler(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t * pRx_counter);
+
+#endif /* __NUCLEO476_UART_H */
diff --git a/project/Core/Inc/Devices/adc.h b/project/Core/Inc/Devices/adc.h
new file mode 100644
index 0000000..15713a8
--- /dev/null
+++ b/project/Core/Inc/Devices/adc.h
@@ -0,0 +1,19 @@
+/*
+ * adc.h
+ *
+ *  Created on: Apr 13, 2022
+ *      Author: bruce
+ */
+
+#ifndef INC_ADC_H_
+#define INC_ADC_H_
+
+#include "stm32l4xx.h"
+
+#define ADC_CHANNEL ADC_CHANNEL_5 // A0 on the left connector
+
+void ADC_Init ();
+void ADC_Start ();
+uint32_t ADC_Read_Value_Blocking ();
+
+#endif /* INC_ADC_H_ */
diff --git a/project/Core/Inc/Devices/dac.h b/project/Core/Inc/Devices/dac.h
new file mode 100644
index 0000000..6425c77
--- /dev/null
+++ b/project/Core/Inc/Devices/dac.h
@@ -0,0 +1,19 @@
+/*
+ * dac.h
+ *
+ *  Created on: Apr 13, 2022
+ *      Author: bruce
+ */
+
+#ifndef INC_DAC_H_
+#define INC_DAC_H_
+
+#include "stm32l4xx.h"
+
+// Uses A2 on the right connector
+
+void DAC_Init ();
+void DAC_Start ();
+void DAC_Set_Value (uint32_t value);
+
+#endif /* INC_DAC_H_ */
diff --git a/project/Core/Inc/GPIO.h b/project/Core/Inc/GPIO.h
deleted file mode 100644
index cb602d8..0000000
--- a/project/Core/Inc/GPIO.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * gpio.h
- *
- *  Created on: Nov 4, 2021
- *      Author: Mitesh Parikh
- */
-
-#ifndef INC_GPIO_H_
-#define INC_GPIO_H_
-
-#include "main.h"
-
-#define S1_Pin GPIO_PIN_9
-#define S1_GPIO_Port GPIOA
-
-void GPIO_Init(void);
-
-#endif /* INC_GPIO_H_ */
diff --git a/project/Core/Inc/LED.h b/project/Core/Inc/LED.h
deleted file mode 100644
index 464b56b..0000000
--- a/project/Core/Inc/LED.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef __NUCLEO476_LED_H
-#define __NUCLEO476_LED_H
-
-#include "stm32l476xx.h"
-
-void LED_Init(void);
-
-void LED_Off(void);
-void LED_On(void);
-void LED_Toggle(void);
-
-#endif /* __NUCLEO476_LED_H */
diff --git a/project/Core/Inc/Project/project.h b/project/Core/Inc/Project/project.h
new file mode 100644
index 0000000..bf37141
--- /dev/null
+++ b/project/Core/Inc/Project/project.h
@@ -0,0 +1,13 @@
+/*
+ * project.h
+ *
+ *  Created on: Jan 8, 2023
+ *      Author: bruce
+ */
+
+#ifndef INC_PROJECT_H_
+#define INC_PROJECT_H_
+
+void run_project ();
+
+#endif /* INC_PROJECT_H_ */
diff --git a/project/Core/Inc/Project/song.h b/project/Core/Inc/Project/song.h
new file mode 100644
index 0000000..3b99388
--- /dev/null
+++ b/project/Core/Inc/Project/song.h
@@ -0,0 +1,23 @@
+/*
+ * song.h
+ *
+ *  Created on: May 14, 2022
+ *      Author: Bruce Herring
+ *
+ *  DO NOT MODIFY
+ */
+
+#ifndef INC_SONG_H_
+#define INC_SONG_H_
+
+#include <stdint.h>
+
+// A little struct to help make tracking songs easier.
+typedef struct {
+	unsigned char* p_song;
+	unsigned int size;
+}song;
+
+song get_song (uint8_t);
+
+#endif /* INC_SONG_H_ */
diff --git a/project/Core/Inc/Project/tone.h b/project/Core/Inc/Project/tone.h
new file mode 100644
index 0000000..b30e252
--- /dev/null
+++ b/project/Core/Inc/Project/tone.h
@@ -0,0 +1,49 @@
+/*
+ * tone.h
+ *
+ *  Created on: May 14, 2022
+ *      Author: bruce
+ */
+
+#ifndef INC_TONE_H_
+#define INC_TONE_H_
+
+#include "dac.h"
+
+/**
+ * SysTick handler. Since tones are controlled by software, the SysTick timer
+ * must be used accurately manage the times.
+ */
+void SysTick_Handler();
+
+/**
+ * Accessor for the counter. Useful for knowing what the current "time" is
+ * in the system.
+ */
+uint32_t get_counter ();
+
+void reset_counter ();
+
+/**
+ * Utility function that converts a frequency into a Systick timer ticks.
+ */
+uint32_t hertz_to_systicks (float hertz);
+
+/**
+ * Adds a tone to be played.
+ */
+uint8_t add_tone (uint8_t note, uint8_t velocity);
+
+/**
+ * Removes a tone from the current group of tones that can be played.
+ */
+uint8_t remove_tone (uint8_t note);
+
+
+/**
+ * Starts playing any tones that have been added.
+ */
+void play_tones ();
+
+
+#endif /* INC_TONE_H_ */
diff --git a/project/Core/Inc/SysClock.h b/project/Core/Inc/SysClock.h
deleted file mode 100644
index 338ec88..0000000
--- a/project/Core/Inc/SysClock.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef __NUCLEO476_CLOCK_H
-#define __NUCLEO476_CLOCK_H
-
-#include "stm32l476xx.h"
-
-void System_Clock_Init(void);
-
-#endif /* __NUCLEO476_CLOCK_H */
-
-
-
diff --git a/project/Core/Inc/System/SysClock.h b/project/Core/Inc/System/SysClock.h
new file mode 100644
index 0000000..338ec88
--- /dev/null
+++ b/project/Core/Inc/System/SysClock.h
@@ -0,0 +1,11 @@
+#ifndef __NUCLEO476_CLOCK_H
+#define __NUCLEO476_CLOCK_H
+
+#include "stm32l476xx.h"
+
+void System_Clock_Init(void);
+
+#endif /* __NUCLEO476_CLOCK_H */
+
+
+
diff --git a/project/Core/Inc/System/error_handler.h b/project/Core/Inc/System/error_handler.h
new file mode 100644
index 0000000..5a1f3ca
--- /dev/null
+++ b/project/Core/Inc/System/error_handler.h
@@ -0,0 +1,6 @@
+#ifndef __ERROR_HANDLER_H
+#define __ERROR_HANDLER_H
+
+void Error_Handler ();
+
+#endif /* __ERROR_HANDLER_H */
\ No newline at end of file
diff --git a/project/Core/Inc/System/stm32l4xx_hal_conf.h b/project/Core/Inc/System/stm32l4xx_hal_conf.h
new file mode 100644
index 0000000..977890f
--- /dev/null
+++ b/project/Core/Inc/System/stm32l4xx_hal_conf.h
@@ -0,0 +1,483 @@
+/**
+  ******************************************************************************
+  * @file    stm32l4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32l4xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L4xx_HAL_CONF_H
+#define STM32L4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_CAN_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DAC_MODULE_ENABLED
+/*#define HAL_DCMI_MODULE_ENABLED   */
+/*#define HAL_DMA2D_MODULE_ENABLED   */
+/*#define HAL_DFSDM_MODULE_ENABLED   */
+/*#define HAL_DSI_MODULE_ENABLED   */
+/*#define HAL_FIREWALL_MODULE_ENABLED   */
+/*#define HAL_GFXMMU_MODULE_ENABLED   */
+/*#define HAL_HCD_MODULE_ENABLED   */
+/*#define HAL_HASH_MODULE_ENABLED   */
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+/*#define HAL_LTDC_MODULE_ENABLED   */
+/*#define HAL_LCD_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_MMC_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_OSPI_MODULE_ENABLED   */
+/*#define HAL_OSPI_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_PKA_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SPI_MODULE_ENABLED   */
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_SWPMI_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_TSC_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+/*#define HAL_EXTI_MODULE_ENABLED   */
+/*#define HAL_PSSI_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+// #define HAL_I2C_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal Multiple Speed oscillator (MSI) default value.
+  *        This value is the default MSI range value after Reset.
+  */
+#if !defined  (MSI_VALUE)
+  #define MSI_VALUE    ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+ #define HSI48_VALUE   ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
+                                              The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  32000U       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U   /*!< Time out for LSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for SAI1 peripheral
+  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+  *        frequency.
+  */
+#if !defined  (EXTERNAL_SAI1_CLOCK_VALUE)
+  #define EXTERNAL_SAI1_CLOCK_VALUE    2097000U /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/**
+  * @brief External clock source for SAI2 peripheral
+  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+  *        frequency.
+  */
+#if !defined  (EXTERNAL_SAI2_CLOCK_VALUE)
+  #define EXTERNAL_SAI2_CLOCK_VALUE    2097000U /*!< Value of the SAI2 External clock source in Hz*/
+#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE					  3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0U    /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+  * @brief Set below the peripheral configuration  to "1U" to add the support
+  *        of HAL callback registration/deregistration feature for the HAL
+  *        driver(s). This allows user application to provide specific callback
+  *        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+  *        the default weak callback functions (see each stm32l4xx_hal_ppp.h file
+  *        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+  *        for each PPP peripheral).
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CAN_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_DCMI_REGISTER_CALLBACKS       0U
+#define USE_HAL_DFSDM_REGISTER_CALLBACKS      0U
+#define USE_HAL_DMA2D_REGISTER_CALLBACKS      0U
+#define USE_HAL_DSI_REGISTER_CALLBACKS        0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
+#define USE_HAL_HCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_LTDC_REGISTER_CALLBACKS       0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_OSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SD_REGISTER_CALLBACKS         0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SWPMI_REGISTER_CALLBACKS      0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_TSC_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32l4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32l4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32l4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+  #include "stm32l4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32l4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32l4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32l4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "Legacy/stm32l4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32l4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32l4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32l4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32l4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32l4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32l4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+  #include "stm32l4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32l4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32l4xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FIREWALL_MODULE_ENABLED
+  #include "stm32l4xx_hal_firewall.h"
+#endif /* HAL_FIREWALL_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32l4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32l4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+  #include "stm32l4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+  #include "stm32l4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+  #include "stm32l4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+  #include "stm32l4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+  #include "stm32l4xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32l4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+  #include "stm32l4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+  #include "stm32l4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32l4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32l4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+  #include "stm32l4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+  #include "stm32l4xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32l4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32l4xx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+  #include "stm32l4xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+  #include "stm32l4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+  #include "stm32l4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32l4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+  #include "stm32l4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+  #include "stm32l4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+  #include "stm32l4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+  #include "stm32l4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+  #include "stm32l4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+  #include "stm32l4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32l4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+  #include "stm32l4xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+  #include "stm32l4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+  #include "stm32l4xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+  #include "stm32l4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+  #include "stm32l4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+  #include "stm32l4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L4xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Inc/System/stm32l4xx_it.h b/project/Core/Inc/System/stm32l4xx_it.h
new file mode 100644
index 0000000..e03ed30
--- /dev/null
+++ b/project/Core/Inc/System/stm32l4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32l4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L4xx_IT_H
+#define __STM32L4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L4xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Inc/System/systick.h b/project/Core/Inc/System/systick.h
new file mode 100644
index 0000000..6bca9fc
--- /dev/null
+++ b/project/Core/Inc/System/systick.h
@@ -0,0 +1,17 @@
+/*
+ * systick.h
+ *
+ *  Created on: Jan 8, 2023
+ *      Author: bruce
+ */
+
+#ifndef INC_SYSTICK_H_
+#define INC_SYSTICK_H_
+
+// This function is to Initialize SysTick registers
+void init_systick();
+
+// This fuction is to create delay using SysTick timer counter
+void delay_systick();
+
+#endif /* INC_SYSTICK_H_ */
diff --git a/project/Core/Inc/UART.h b/project/Core/Inc/UART.h
deleted file mode 100644
index e9c0f33..0000000
--- a/project/Core/Inc/UART.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef __NUCLEO476_UART_H
-#define __NUCLEO476_UART_H
-
-#include "stm32l476xx.h"
-
-#define BUFFER_SIZE (32)
-
-void UART2_Init(void);
-void UART2_GPIO_Init(void);
-void USART1_IRQHandler(void);
-void USART2_IRQHandler(void);
-void USART_Init(USART_TypeDef * USARTx);
-void USART_Write(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t nBytes);
-uint8_t   USART_Read(USART_TypeDef * USARTx);
-void USART_Delay(uint32_t us);
-void USART_IRQHandler(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t * pRx_counter);
-
-#endif /* __NUCLEO476_UART_H */
diff --git a/project/Core/Inc/adc.h b/project/Core/Inc/adc.h
deleted file mode 100644
index 15713a8..0000000
--- a/project/Core/Inc/adc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * adc.h
- *
- *  Created on: Apr 13, 2022
- *      Author: bruce
- */
-
-#ifndef INC_ADC_H_
-#define INC_ADC_H_
-
-#include "stm32l4xx.h"
-
-#define ADC_CHANNEL ADC_CHANNEL_5 // A0 on the left connector
-
-void ADC_Init ();
-void ADC_Start ();
-uint32_t ADC_Read_Value_Blocking ();
-
-#endif /* INC_ADC_H_ */
diff --git a/project/Core/Inc/dac.h b/project/Core/Inc/dac.h
deleted file mode 100644
index 6425c77..0000000
--- a/project/Core/Inc/dac.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * dac.h
- *
- *  Created on: Apr 13, 2022
- *      Author: bruce
- */
-
-#ifndef INC_DAC_H_
-#define INC_DAC_H_
-
-#include "stm32l4xx.h"
-
-// Uses A2 on the right connector
-
-void DAC_Init ();
-void DAC_Start ();
-void DAC_Set_Value (uint32_t value);
-
-#endif /* INC_DAC_H_ */
diff --git a/project/Core/Inc/error_handler.h b/project/Core/Inc/error_handler.h
deleted file mode 100644
index 5a1f3ca..0000000
--- a/project/Core/Inc/error_handler.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ERROR_HANDLER_H
-#define __ERROR_HANDLER_H
-
-void Error_Handler ();
-
-#endif /* __ERROR_HANDLER_H */
\ No newline at end of file
diff --git a/project/Core/Inc/project.h b/project/Core/Inc/project.h
deleted file mode 100644
index bf37141..0000000
--- a/project/Core/Inc/project.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * project.h
- *
- *  Created on: Jan 8, 2023
- *      Author: bruce
- */
-
-#ifndef INC_PROJECT_H_
-#define INC_PROJECT_H_
-
-void run_project ();
-
-#endif /* INC_PROJECT_H_ */
diff --git a/project/Core/Inc/song.h b/project/Core/Inc/song.h
deleted file mode 100644
index 3b99388..0000000
--- a/project/Core/Inc/song.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * song.h
- *
- *  Created on: May 14, 2022
- *      Author: Bruce Herring
- *
- *  DO NOT MODIFY
- */
-
-#ifndef INC_SONG_H_
-#define INC_SONG_H_
-
-#include <stdint.h>
-
-// A little struct to help make tracking songs easier.
-typedef struct {
-	unsigned char* p_song;
-	unsigned int size;
-}song;
-
-song get_song (uint8_t);
-
-#endif /* INC_SONG_H_ */
diff --git a/project/Core/Inc/stm32l4xx_hal_conf.h b/project/Core/Inc/stm32l4xx_hal_conf.h
deleted file mode 100644
index 977890f..0000000
--- a/project/Core/Inc/stm32l4xx_hal_conf.h
+++ /dev/null
@@ -1,483 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l4xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration template file.
-  *          This file should be copied to the application folder and renamed
-  *          to stm32l4xx_hal_conf.h.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef STM32L4xx_HAL_CONF_H
-#define STM32L4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-#define HAL_ADC_MODULE_ENABLED
-/*#define HAL_CRYP_MODULE_ENABLED   */
-/*#define HAL_CAN_MODULE_ENABLED   */
-/*#define HAL_COMP_MODULE_ENABLED   */
-/*#define HAL_CRC_MODULE_ENABLED   */
-/*#define HAL_CRYP_MODULE_ENABLED   */
-#define HAL_DAC_MODULE_ENABLED
-/*#define HAL_DCMI_MODULE_ENABLED   */
-/*#define HAL_DMA2D_MODULE_ENABLED   */
-/*#define HAL_DFSDM_MODULE_ENABLED   */
-/*#define HAL_DSI_MODULE_ENABLED   */
-/*#define HAL_FIREWALL_MODULE_ENABLED   */
-/*#define HAL_GFXMMU_MODULE_ENABLED   */
-/*#define HAL_HCD_MODULE_ENABLED   */
-/*#define HAL_HASH_MODULE_ENABLED   */
-/*#define HAL_I2S_MODULE_ENABLED   */
-/*#define HAL_IRDA_MODULE_ENABLED   */
-/*#define HAL_IWDG_MODULE_ENABLED   */
-/*#define HAL_LTDC_MODULE_ENABLED   */
-/*#define HAL_LCD_MODULE_ENABLED   */
-/*#define HAL_LPTIM_MODULE_ENABLED   */
-/*#define HAL_MMC_MODULE_ENABLED   */
-/*#define HAL_NAND_MODULE_ENABLED   */
-/*#define HAL_NOR_MODULE_ENABLED   */
-/*#define HAL_OPAMP_MODULE_ENABLED   */
-/*#define HAL_OSPI_MODULE_ENABLED   */
-/*#define HAL_OSPI_MODULE_ENABLED   */
-/*#define HAL_PCD_MODULE_ENABLED   */
-/*#define HAL_PKA_MODULE_ENABLED   */
-/*#define HAL_QSPI_MODULE_ENABLED   */
-/*#define HAL_QSPI_MODULE_ENABLED   */
-/*#define HAL_RNG_MODULE_ENABLED   */
-/*#define HAL_RTC_MODULE_ENABLED   */
-/*#define HAL_SAI_MODULE_ENABLED   */
-/*#define HAL_SD_MODULE_ENABLED   */
-/*#define HAL_SMBUS_MODULE_ENABLED   */
-/*#define HAL_SMARTCARD_MODULE_ENABLED   */
-/*#define HAL_SPI_MODULE_ENABLED   */
-/*#define HAL_SRAM_MODULE_ENABLED   */
-/*#define HAL_SWPMI_MODULE_ENABLED   */
-/*#define HAL_TIM_MODULE_ENABLED   */
-/*#define HAL_TSC_MODULE_ENABLED   */
-/*#define HAL_UART_MODULE_ENABLED   */
-/*#define HAL_USART_MODULE_ENABLED   */
-/*#define HAL_WWDG_MODULE_ENABLED   */
-/*#define HAL_EXTI_MODULE_ENABLED   */
-/*#define HAL_PSSI_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_EXTI_MODULE_ENABLED
-// #define HAL_I2C_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal Multiple Speed oscillator (MSI) default value.
-  *        This value is the default MSI range value after Reset.
-  */
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
-  *        This internal oscillator is mainly dedicated to provide a high precision clock to
-  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
-  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
-  *        which is subject to manufacturing process variations.
-  */
-#if !defined  (HSI48_VALUE)
- #define HSI48_VALUE   ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
-                                              The real value my vary depending on manufacturing process variations.*/
-#endif /* HSI48_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  32000U       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  *        This value is used by the UART, RTC HAL module to compute the system frequency
-  */
-#if !defined  (LSE_VALUE)
-  #define LSE_VALUE    32768U /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    5000U   /*!< Time out for LSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for SAI1 peripheral
-  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
-  *        frequency.
-  */
-#if !defined  (EXTERNAL_SAI1_CLOCK_VALUE)
-  #define EXTERNAL_SAI1_CLOCK_VALUE    2097000U /*!< Value of the SAI1 External clock source in Hz*/
-#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
-
-/**
-  * @brief External clock source for SAI2 peripheral
-  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
-  *        frequency.
-  */
-#if !defined  (EXTERNAL_SAI2_CLOCK_VALUE)
-  #define EXTERNAL_SAI2_CLOCK_VALUE    2097000U /*!< Value of the SAI2 External clock source in Hz*/
-#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-
-#define  VDD_VALUE					  3300U /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            0U    /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              0U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Register callback feature configuration ############### */
-/**
-  * @brief Set below the peripheral configuration  to "1U" to add the support
-  *        of HAL callback registration/deregistration feature for the HAL
-  *        driver(s). This allows user application to provide specific callback
-  *        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
-  *        the default weak callback functions (see each stm32l4xx_hal_ppp.h file
-  *        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
-  *        for each PPP peripheral).
-  */
-#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
-#define USE_HAL_CAN_REGISTER_CALLBACKS        0U
-#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
-#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
-#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
-#define USE_HAL_DCMI_REGISTER_CALLBACKS       0U
-#define USE_HAL_DFSDM_REGISTER_CALLBACKS      0U
-#define USE_HAL_DMA2D_REGISTER_CALLBACKS      0U
-#define USE_HAL_DSI_REGISTER_CALLBACKS        0U
-#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
-#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
-#define USE_HAL_HCD_REGISTER_CALLBACKS        0U
-#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
-#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
-#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
-#define USE_HAL_LTDC_REGISTER_CALLBACKS       0U
-#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
-#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
-#define USE_HAL_OSPI_REGISTER_CALLBACKS       0U
-#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
-#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
-#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
-#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
-#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
-#define USE_HAL_SD_REGISTER_CALLBACKS         0U
-#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
-#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
-#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
-#define USE_HAL_SWPMI_REGISTER_CALLBACKS      0U
-#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
-#define USE_HAL_TSC_REGISTER_CALLBACKS        0U
-#define USE_HAL_UART_REGISTER_CALLBACKS       0U
-#define USE_HAL_USART_REGISTER_CALLBACKS      0U
-#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
- * Activated: CRC code is present inside driver
- * Deactivated: CRC code cleaned from driver
- */
-
-#define USE_SPI_CRC                   0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32l4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32l4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32l4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
-  #include "stm32l4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32l4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32l4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32l4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "Legacy/stm32l4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-  #include "stm32l4xx_hal_comp.h"
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32l4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32l4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32l4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32l4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32l4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
-  #include "stm32l4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32l4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_GFXMMU_MODULE_ENABLED
-  #include "stm32l4xx_hal_gfxmmu.h"
-#endif /* HAL_GFXMMU_MODULE_ENABLED */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
-  #include "stm32l4xx_hal_firewall.h"
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32l4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
-  #include "stm32l4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
-  #include "stm32l4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-  #include "stm32l4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
-  #include "stm32l4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
-  #include "stm32l4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LCD_MODULE_ENABLED
-  #include "stm32l4xx_hal_lcd.h"
-#endif /* HAL_LCD_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-  #include "stm32l4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
-  #include "stm32l4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
-  #include "stm32l4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32l4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32l4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_OPAMP_MODULE_ENABLED
-  #include "stm32l4xx_hal_opamp.h"
-#endif /* HAL_OPAMP_MODULE_ENABLED */
-
-#ifdef HAL_OSPI_MODULE_ENABLED
-  #include "stm32l4xx_hal_ospi.h"
-#endif /* HAL_OSPI_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
-  #include "stm32l4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_PKA_MODULE_ENABLED
-  #include "stm32l4xx_hal_pka.h"
-#endif /* HAL_PKA_MODULE_ENABLED */
-
-#ifdef HAL_PSSI_MODULE_ENABLED
-  #include "stm32l4xx_hal_pssi.h"
-#endif /* HAL_PSSI_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
-  #include "stm32l4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
-  #include "stm32l4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
-  #include "stm32l4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-  #include "stm32l4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
-  #include "stm32l4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
-  #include "stm32l4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
-  #include "stm32l4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
-  #include "stm32l4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
-  #include "stm32l4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32l4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_SWPMI_MODULE_ENABLED
-  #include "stm32l4xx_hal_swpmi.h"
-#endif /* HAL_SWPMI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-  #include "stm32l4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_TSC_MODULE_ENABLED
-  #include "stm32l4xx_hal_tsc.h"
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
-  #include "stm32l4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
-  #include "stm32l4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
-  #include "stm32l4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t *file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32L4xx_HAL_CONF_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Inc/stm32l4xx_it.h b/project/Core/Inc/stm32l4xx_it.h
deleted file mode 100644
index e03ed30..0000000
--- a/project/Core/Inc/stm32l4xx_it.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
-  ******************************************************************************
-  * @file    stm32l4xx_it.h
-  * @brief   This file contains the headers of the interrupt handlers.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
- ******************************************************************************
-  */
-/* USER CODE END Header */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L4xx_IT_H
-#define __STM32L4xx_IT_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
-/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
-
-/* Exported functions prototypes ---------------------------------------------*/
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L4xx_IT_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Inc/systick.h b/project/Core/Inc/systick.h
deleted file mode 100644
index 6bca9fc..0000000
--- a/project/Core/Inc/systick.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * systick.h
- *
- *  Created on: Jan 8, 2023
- *      Author: bruce
- */
-
-#ifndef INC_SYSTICK_H_
-#define INC_SYSTICK_H_
-
-// This function is to Initialize SysTick registers
-void init_systick();
-
-// This fuction is to create delay using SysTick timer counter
-void delay_systick();
-
-#endif /* INC_SYSTICK_H_ */
diff --git a/project/Core/Inc/tone.h b/project/Core/Inc/tone.h
deleted file mode 100644
index b30e252..0000000
--- a/project/Core/Inc/tone.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * tone.h
- *
- *  Created on: May 14, 2022
- *      Author: bruce
- */
-
-#ifndef INC_TONE_H_
-#define INC_TONE_H_
-
-#include "dac.h"
-
-/**
- * SysTick handler. Since tones are controlled by software, the SysTick timer
- * must be used accurately manage the times.
- */
-void SysTick_Handler();
-
-/**
- * Accessor for the counter. Useful for knowing what the current "time" is
- * in the system.
- */
-uint32_t get_counter ();
-
-void reset_counter ();
-
-/**
- * Utility function that converts a frequency into a Systick timer ticks.
- */
-uint32_t hertz_to_systicks (float hertz);
-
-/**
- * Adds a tone to be played.
- */
-uint8_t add_tone (uint8_t note, uint8_t velocity);
-
-/**
- * Removes a tone from the current group of tones that can be played.
- */
-uint8_t remove_tone (uint8_t note);
-
-
-/**
- * Starts playing any tones that have been added.
- */
-void play_tones ();
-
-
-#endif /* INC_TONE_H_ */
diff --git a/project/Core/Src/Devices/GPIO.c b/project/Core/Src/Devices/GPIO.c
new file mode 100644
index 0000000..f3812fa
--- /dev/null
+++ b/project/Core/Src/Devices/GPIO.c
@@ -0,0 +1,50 @@
+/*
+ * gpio.c
+ *
+ *  Created on: Nov 4, 2021
+ *      Author: Mitesh Parikh
+ */
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "GPIO.h"
+#include <stdbool.h>
+#include "stm32l4xx.h"
+
+// External Global Variables that we will need access to
+
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO                                                             */
+/*----------------------------------------------------------------------------*/
+void GPIO_Init(void)
+{
+	GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+	/* GPIO Ports Clock Enable */
+	__HAL_RCC_GPIOC_CLK_ENABLE();
+	__HAL_RCC_GPIOH_CLK_ENABLE();
+	__HAL_RCC_GPIOA_CLK_ENABLE();
+	__HAL_RCC_GPIOB_CLK_ENABLE();
+
+	/*Configure GPIO pin : PtPin */
+	GPIO_InitStruct.Pin = B1_Pin;
+	GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+	GPIO_InitStruct.Pull = GPIO_NOPULL;
+	HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
+
+	GPIO_InitStruct.Pin = S1_Pin;
+	GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
+	GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+	HAL_GPIO_Init(S1_GPIO_Port, &GPIO_InitStruct);
+
+	/* EXTI15_10_IRQn interrupt init*/
+	// Note you will have to add EXTI15_10_IRQn Interrupt handler function as well
+	// This is the interrupt handler for the blue button
+
+
+	/* EXTI9_5_IRQn interrupt init*/
+	// Note you will have to add EXTI9_15_IRQn Interrupt handler function as well
+	// This is the interrupt handler for the external buttons (S1)
+}
+
diff --git a/project/Core/Src/Devices/LED.c b/project/Core/Src/Devices/LED.c
new file mode 100644
index 0000000..8b1b9b2
--- /dev/null
+++ b/project/Core/Src/Devices/LED.c
@@ -0,0 +1,49 @@
+#include "LED.h"
+
+
+//******************************************************************************************
+// User LED = LD2 Green LED = PA.5
+//******************************************************************************************
+#define LED_PIN 5
+
+void LED_Init(void){
+	
+	// Enable the peripheral clock of GPIO Port	
+	RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;	
+
+	// GPIO Mode: Input(00), Output(01), AlterFunc(10), Analog(11, reset)
+	GPIOA->MODER &= ~(3U<<(2*LED_PIN));  
+	GPIOA->MODER |= 1U<<(2*LED_PIN);      //  Output(01)
+	
+	// GPIO Speed: Low speed (00), Medium speed (01), Fast speed (10), High speed (11)
+	GPIOA->OSPEEDR &= ~(3U<<(2*LED_PIN));
+	GPIOA->OSPEEDR |=   3U<<(2*LED_PIN);  // High speed
+	
+	// GPIO Output Type: Output push-pull (0, reset), Output open drain (1) 
+	GPIOA->OTYPER &= ~(1U<<LED_PIN);       // Push-pull
+	
+	// GPIO Push-Pull: No pull-up, pull-down (00), Pull-up (01), Pull-down (10), Reserved (11)
+	GPIOA->PUPDR   &= ~(3U<<(2*LED_PIN));  // No pull-up, no pull-down
+	
+}
+
+//******************************************************************************************
+// Turn LED On
+//******************************************************************************************
+void LED_On(void){
+	GPIOA->ODR |= (1UL<<LED_PIN);
+}
+
+//******************************************************************************************
+// Turn LED Off
+//******************************************************************************************
+void LED_Off(void){
+	GPIOA->ODR &= ~(1UL<<LED_PIN);
+}
+
+//******************************************************************************************
+// Toggle LED 
+//******************************************************************************************
+void LED_Toggle(void){
+	GPIOA->ODR ^= (1UL<<LED_PIN);
+}
diff --git a/project/Core/Src/Devices/UART.c b/project/Core/Src/Devices/UART.c
new file mode 100644
index 0000000..b1eb30c
--- /dev/null
+++ b/project/Core/Src/Devices/UART.c
@@ -0,0 +1,152 @@
+#include "UART.h"
+
+
+// UART Ports:
+// ===================================================
+// PA.2 = USART2_TX (AF7)  
+// PA.3 = USART2_RX (AF7)
+
+#define TX_PIN 2
+#define RX_PIN 3
+
+void UART2_Init(void) {
+	// Enable the clock of USART 1 & 2
+	RCC->APB1ENR1 |= RCC_APB1ENR1_USART2EN;  // Enable USART 2 clock		
+	
+	// Select the USART1 clock source
+	// 00: PCLK selected as USART2 clock
+	// 01: System clock (SYSCLK) selected as USART2 clock
+	// 10: HSI16 clock selected as USART2 clock
+	// 11: LSE clock selected as USART2 clock
+	RCC->CCIPR &= ~RCC_CCIPR_USART2SEL;
+	RCC->CCIPR |=  RCC_CCIPR_USART2SEL_0;
+	
+	UART2_GPIO_Init();
+	USART_Init(USART2);
+	
+	//NVIC_SetPriority(USART2_IRQn, 0);			// Set Priority to 1
+	//NVIC_EnableIRQ(USART2_IRQn);					// Enable interrupt of USART1 peripheral
+}
+
+void UART2_GPIO_Init(void) {
+	
+	// Enable the peripheral clock of GPIO Port
+	RCC->AHB2ENR |=   RCC_AHB2ENR_GPIOAEN;
+	
+	// ********************** USART 2 ***************************
+	// PA2 = USART2_TX (AF7)
+	// PA3 = USART2_RX (AF7)
+	// Alternate function, High Speed, Push pull, Pull up
+	// **********************************************************
+	// Input(00), Output(01), AlterFunc(10), Analog(11)
+	GPIOA->MODER   &= ~(3<<(2*TX_PIN) | 3<<(2*RX_PIN));	// Clear bits
+	GPIOA->MODER   |=   2<<(2*TX_PIN) | 2<<(2*RX_PIN); 
+	GPIOA->AFR[0]  &= ~(0xF<<(4*TX_PIN) | 0xF<<(4*RX_PIN));	
+	GPIOA->AFR[0]  |=   7<<(4*TX_PIN) | 7<<(4*RX_PIN);       	
+	// GPIO Speed: Low speed (00), Medium speed (01), Fast speed (10), High speed (11)
+	GPIOA->OSPEEDR |=   3<<(2*TX_PIN) | 3<<(2*RX_PIN); 					 	
+	// GPIO Push-Pull: No pull-up, pull-down (00), Pull-up (01), Pull-down (10), Reserved (11)
+	GPIOA->PUPDR   &= ~(3<<(2*TX_PIN) | 3<<(2*RX_PIN));
+	// GPIO Output Type: Output push-pull (0, reset), Output open drain (1) 
+	GPIOA->OTYPER  &=  ~(1<<TX_PIN | 1<<RX_PIN);       	
+}
+
+
+void USART_Init (USART_TypeDef * USARTx) {
+	// Default setting: 
+	//     No hardware flow control, 8 data bits, no parity, 1 start bit and 1 stop bit		
+	USARTx->CR1 &= ~USART_CR1_UE;  // Disable USART
+	
+	// Configure word length to 8 bit
+	USARTx->CR1 &= ~USART_CR1_M;   // M: 00 = 8 data bits, 01 = 9 data bits, 10 = 7 data bits
+	
+	// Configure oversampling mode: Oversampling by 16 
+	USARTx->CR1 &= ~USART_CR1_OVER8;  // 0 = oversampling by 16, 1 = oversampling by 8
+	
+	// Configure stop bits to 1 stop bit
+	//   00: 1 Stop bit;      01: 0.5 Stop bit
+	//   10: 2 Stop bits;     11: 1.5 Stop bit
+	USARTx->CR2 &= ~USART_CR2_STOP;   
+                                    
+	// CSet Baudrate to 9600 using APB frequency (80,000,000 Hz)
+	// If oversampling by 16, Tx/Rx baud = f_CK / USARTDIV,  
+	// If oversampling by 8,  Tx/Rx baud = 2*f_CK / USARTDIV
+  // When OVER8 = 0, BRR = USARTDIV
+	// USARTDIV = 80MHz/9600 = 8333 = 0x208D
+	USARTx->BRR  = 0x208D; // Limited to 16 bits
+
+	USARTx->CR1  |= (USART_CR1_RE | USART_CR1_TE);  	// Transmitter and Receiver enable
+	
+  if (USARTx == UART4){	
+		USARTx->CR1 |= USART_CR1_RXNEIE;  			// Received Data Ready to be Read Interrupt  
+		USARTx->CR1 &= ~USART_CR1_TCIE;    			// Transmission Complete Interrupt 
+		USARTx->CR1 &= ~USART_CR1_IDLEIE;  			// Idle Line Detected Interrupt 
+		USARTx->CR1 &= ~USART_CR1_TXEIE;   			// Transmit Data Register Empty Interrupt 
+		USARTx->CR1 &= ~USART_CR1_PEIE;    			// Parity Error Interrupt 
+		USARTx->CR1 &= ~USART_CR2_LBDIE;				// LIN Break Detection Interrupt Enable
+		USARTx->CR1 &= ~USART_CR3_EIE;					// Error Interrupt Enable (Frame error, noise error, overrun error) 
+		//USARTx->CR3 &= ~USART_CR3_CTSIE;				// CTS Interrupt
+	}
+
+	if (USARTx == USART2){
+		USARTx->ICR |= USART_ICR_TCCF;
+		USART1->CR3 |= USART_CR3_DMAT | USART_CR3_DMAR;
+	}
+	
+	USARTx->CR1  |= USART_CR1_UE; // USART enable                 
+	
+	while ( (USARTx->ISR & USART_ISR_TEACK) == 0); // Verify that the USART is ready for reception
+	while ( (USARTx->ISR & USART_ISR_REACK) == 0); // Verify that the USART is ready for transmission
+}
+
+
+uint8_t USART_Read (USART_TypeDef * USARTx) {
+	// SR_RXNE (Read data register not empty) bit is set by hardware
+	while (!(USARTx->ISR & USART_ISR_RXNE));  // Wait until RXNE (RX not empty) bit is set
+	// USART resets the RXNE flag automatically after reading DR
+	return ((uint8_t)(USARTx->RDR & 0xFF));
+	// Reading USART_DR automatically clears the RXNE flag 
+}
+
+void USART_Write(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t nBytes) {
+	int i;
+	// TXE is cleared by a write to the USART_DR register.
+	// TXE is set by hardware when the content of the TDR 
+	// register has been transferred into the shift register.
+	for (i = 0; i < nBytes; i++) {
+		while (!(USARTx->ISR & USART_ISR_TXE));   	// wait until TXE (TX empty) bit is set
+		// Writing USART_DR automatically clears the TXE flag 	
+		USARTx->TDR = buffer[i] & 0xFF;
+		USART_Delay(300);
+	}
+	while (!(USARTx->ISR & USART_ISR_TC));   		  // wait until TC bit is set
+	USARTx->ISR &= ~USART_ISR_TC;
+}   
+ 
+
+void USART_Delay(uint32_t us) {
+	uint32_t time = 100*us/7;    
+	while(--time);   
+}
+
+void USART_IRQHandler(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t * pRx_counter){
+	if(USARTx->ISR & USART_ISR_RXNE) {						// Received data                         
+		buffer[*pRx_counter] = USARTx->RDR;         // Reading USART_DR automatically clears the RXNE flag 
+		(*pRx_counter)++;  
+		if((*pRx_counter) >= BUFFER_SIZE )  {
+			(*pRx_counter) = 0;
+		}   
+	} else if(USARTx->ISR & USART_ISR_TXE) {
+ 		//USARTx->ISR &= ~USART_ISR_TXE;            // clear interrupt 
+		//Tx1_Counter++;
+	} else if(USARTx->ISR & USART_ISR_ORE) {			// Overrun Error
+		while(1);
+	} else if(USARTx->ISR & USART_ISR_PE) {				// Parity Error
+		while(1);
+	} else if(USARTx->ISR & USART_ISR_PE) {				// USART_ISR_FE	
+		while(1);
+	} else if (USARTx->ISR & USART_ISR_NE){ 			// Noise Error Flag
+		while(1);     
+	}	
+}
+
diff --git a/project/Core/Src/Devices/adc.c b/project/Core/Src/Devices/adc.c
new file mode 100644
index 0000000..549f4bb
--- /dev/null
+++ b/project/Core/Src/Devices/adc.c
@@ -0,0 +1,130 @@
+/*
+ * adc.c
+ *
+ *  Created on: Apr 13, 2022
+ *      Author: bruce
+ */
+
+#include "adc.h"
+#include "stm32l4xx.h"
+#include "main.h"
+
+ADC_HandleTypeDef hadc1;
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+    PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
+    PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
+    PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
+    PeriphClkInit.PLLSAI1.PLLSAI1N = 8;
+    PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
+    PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
+    PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
+    PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+	{
+    	Error_Handler();
+	}
+
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PA0     ------> ADC1_IN5
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+    __HAL_RCC_ADC_CLK_DISABLE();
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
+  }
+
+}
+
+void ADC_Init () {
+	  ADC_MultiModeTypeDef multimode = {0};
+	  ADC_ChannelConfTypeDef sConfig = {0};
+
+	  /** Common config
+	  */
+	  hadc1.Instance = ADC1;
+	  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
+	  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+	  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+	  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+	  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+	  hadc1.Init.LowPowerAutoWait = DISABLE;
+	  hadc1.Init.ContinuousConvMode = DISABLE;
+	  hadc1.Init.NbrOfConversion = 1;
+	  hadc1.Init.DiscontinuousConvMode = DISABLE;
+	  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+	  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+	  hadc1.Init.DMAContinuousRequests = DISABLE;
+	  hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
+	  hadc1.Init.OversamplingMode = DISABLE;
+	  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+	  {
+		  Error_Handler();
+	  }
+
+	  /** Configure the ADC multi-mode
+	  */
+	  multimode.Mode = ADC_MODE_INDEPENDENT;
+	  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+	  {
+		  Error_Handler();
+	  }
+
+
+	  /** Configure Regular Channel
+	  */
+	  sConfig.Channel = ADC_CHANNEL;
+	  sConfig.Rank = ADC_REGULAR_RANK_1;
+	  sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
+	  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+	  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+	  sConfig.Offset = 0;
+	  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig)  != HAL_OK)
+	  {
+		  Error_Handler();
+	  }
+}
+
+void ADC_Start () {
+	HAL_ADC_Start (&hadc1);
+}
+
+uint32_t ADC_Read_Value_Blocking () {
+	HAL_ADC_PollForConversion (&hadc1, 10);
+	return HAL_ADC_GetValue (&hadc1);
+}
diff --git a/project/Core/Src/Devices/dac.c b/project/Core/Src/Devices/dac.c
new file mode 100644
index 0000000..e03f9ce
--- /dev/null
+++ b/project/Core/Src/Devices/dac.c
@@ -0,0 +1,83 @@
+/*
+ * dac.c
+ *
+ *  Created on: Apr 13, 2022
+ *      Author: bruce
+ */
+
+#include "dac.h"
+#include "main.h"
+#include "stm32l4xx.h"
+
+DAC_HandleTypeDef hdac1;
+
+/**
+* @brief DAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hdac->Instance==DAC1)
+  {
+    __HAL_RCC_DAC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    GPIO_InitStruct.Pin = GPIO_PIN_4;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+  }
+
+}
+
+/**
+* @brief DAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC1)
+  {
+    __HAL_RCC_DAC1_CLK_DISABLE();
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
+  }
+
+}
+
+void DAC_Init () {
+	DAC_ChannelConfTypeDef sConfig = {0};
+
+  /** DAC Initialization
+  */
+  hdac1.Instance = DAC1;
+  if (HAL_DAC_Init(&hdac1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+void DAC_Start () {
+	HAL_DAC_Start (&hdac1, DAC_CHANNEL_1);
+}
+
+void DAC_Set_Value (uint32_t value) {
+	HAL_DAC_SetValue (&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, value);
+}
diff --git a/project/Core/Src/GPIO.c b/project/Core/Src/GPIO.c
deleted file mode 100644
index f3812fa..0000000
--- a/project/Core/Src/GPIO.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * gpio.c
- *
- *  Created on: Nov 4, 2021
- *      Author: Mitesh Parikh
- */
-
-
-/* Includes ------------------------------------------------------------------*/
-#include "GPIO.h"
-#include <stdbool.h>
-#include "stm32l4xx.h"
-
-// External Global Variables that we will need access to
-
-
-/*----------------------------------------------------------------------------*/
-/* Configure GPIO                                                             */
-/*----------------------------------------------------------------------------*/
-void GPIO_Init(void)
-{
-	GPIO_InitTypeDef GPIO_InitStruct = {0};
-
-	/* GPIO Ports Clock Enable */
-	__HAL_RCC_GPIOC_CLK_ENABLE();
-	__HAL_RCC_GPIOH_CLK_ENABLE();
-	__HAL_RCC_GPIOA_CLK_ENABLE();
-	__HAL_RCC_GPIOB_CLK_ENABLE();
-
-	/*Configure GPIO pin : PtPin */
-	GPIO_InitStruct.Pin = B1_Pin;
-	GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
-	GPIO_InitStruct.Pull = GPIO_NOPULL;
-	HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
-
-	GPIO_InitStruct.Pin = S1_Pin;
-	GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
-	GPIO_InitStruct.Pull = GPIO_PULLDOWN;
-	HAL_GPIO_Init(S1_GPIO_Port, &GPIO_InitStruct);
-
-	/* EXTI15_10_IRQn interrupt init*/
-	// Note you will have to add EXTI15_10_IRQn Interrupt handler function as well
-	// This is the interrupt handler for the blue button
-
-
-	/* EXTI9_5_IRQn interrupt init*/
-	// Note you will have to add EXTI9_15_IRQn Interrupt handler function as well
-	// This is the interrupt handler for the external buttons (S1)
-}
-
diff --git a/project/Core/Src/LED.c b/project/Core/Src/LED.c
deleted file mode 100644
index 8b1b9b2..0000000
--- a/project/Core/Src/LED.c
+++ /dev/null
@@ -1,49 +0,0 @@
-#include "LED.h"
-
-
-//******************************************************************************************
-// User LED = LD2 Green LED = PA.5
-//******************************************************************************************
-#define LED_PIN 5
-
-void LED_Init(void){
-	
-	// Enable the peripheral clock of GPIO Port	
-	RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;	
-
-	// GPIO Mode: Input(00), Output(01), AlterFunc(10), Analog(11, reset)
-	GPIOA->MODER &= ~(3U<<(2*LED_PIN));  
-	GPIOA->MODER |= 1U<<(2*LED_PIN);      //  Output(01)
-	
-	// GPIO Speed: Low speed (00), Medium speed (01), Fast speed (10), High speed (11)
-	GPIOA->OSPEEDR &= ~(3U<<(2*LED_PIN));
-	GPIOA->OSPEEDR |=   3U<<(2*LED_PIN);  // High speed
-	
-	// GPIO Output Type: Output push-pull (0, reset), Output open drain (1) 
-	GPIOA->OTYPER &= ~(1U<<LED_PIN);       // Push-pull
-	
-	// GPIO Push-Pull: No pull-up, pull-down (00), Pull-up (01), Pull-down (10), Reserved (11)
-	GPIOA->PUPDR   &= ~(3U<<(2*LED_PIN));  // No pull-up, no pull-down
-	
-}
-
-//******************************************************************************************
-// Turn LED On
-//******************************************************************************************
-void LED_On(void){
-	GPIOA->ODR |= (1UL<<LED_PIN);
-}
-
-//******************************************************************************************
-// Turn LED Off
-//******************************************************************************************
-void LED_Off(void){
-	GPIOA->ODR &= ~(1UL<<LED_PIN);
-}
-
-//******************************************************************************************
-// Toggle LED 
-//******************************************************************************************
-void LED_Toggle(void){
-	GPIOA->ODR ^= (1UL<<LED_PIN);
-}
diff --git a/project/Core/Src/Project/project.c b/project/Core/Src/Project/project.c
new file mode 100644
index 0000000..d029e0b
--- /dev/null
+++ b/project/Core/Src/Project/project.c
@@ -0,0 +1,8 @@
+/*
+ * project.c
+ *
+ *  Created on: Jan 8, 2023
+ *      Author: bruce
+ */
+
+#include "project.h"
diff --git a/project/Core/Src/Project/song.c b/project/Core/Src/Project/song.c
new file mode 100644
index 0000000..e6b4cf7
--- /dev/null
+++ b/project/Core/Src/Project/song.c
@@ -0,0 +1,1774 @@
+/*
+ * song.c
+ *
+ *  Created on: Nov 15, 2022
+ *      Author: bruce
+ */
+
+#include "song.h"
+
+// 1 track - 1 note at a time (required - part 3)
+unsigned char song0[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x01,0x00,0x4d,0x54,0x72,0x6b,
+                        0x00,0x00,0x00,0x57,0x00,0xff,0x58,0x04,0x04,0x02,0x18,0x08,0x00,0xff,0x59,0x02,0x00,0x00,
+                        0x00,0xff,0x51,0x03,0x09,0xa3,0x19,0x00,0xff,0x03,0x1b,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,
+                        0x20,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,0x20,0x4c,0x69,0x74,0x74,0x6c,0x65,0x20,0x53,0x74,
+                        0x61,0x72,0x00,0xff,0x01,0x0b,0x54,0x72,0x61,0x64,0x69,0x74,0x69,0x6f,0x6e,0x61,0x6c,0x00,
+                        0xff,0x02,0x0c,0x4a,0x69,0x6d,0x20,0x50,0x61,0x74,0x65,0x72,0x73,0x6f,0x6e,0x01,0xff,0x2f,
+                        0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x01,0x9a,0x00,0xc0,0x00,0x00,0xb0,0x79,0x00,0x00,0xb0,
+                        0x40,0x00,0x00,0xb0,0x0a,0x3f,0x00,0xb0,0x07,0x5f,0x00,0x90,0x3c,0x4d,0x00,0xff,0x03,0x05,
+                        0x50,0x69,0x61,0x6e,0x6f,0x81,0x74,0x80,0x3c,0x00,0x0c,0x90,0x3c,0x53,0x81,0x74,0x80,0x3c,
+                        0x00,0x0c,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x57,0x81,0x74,0x80,0x43,
+                        0x00,0x0c,0x90,0x45,0x56,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,0x45,0x53,0x81,0x74,0x80,0x45,
+                        0x00,0x0c,0x90,0x43,0x51,0x83,0x67,0x80,0x43,0x00,0x19,0x90,0x41,0x50,0x81,0x74,0x80,0x41,
+                        0x00,0x0c,0x90,0x41,0x55,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,
+                        0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x51,0x81,0x74,0x80,0x3e,
+                        0x00,0x0c,0x90,0x3e,0x53,0x81,0x74,0x80,0x3e,0x00,0x0c,0x90,0x3c,0x51,0x83,0x67,0x80,0x3c,
+                        0x00,0x19,0x90,0x43,0x5e,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x53,0x81,0x74,0x80,0x43,
+                        0x00,0x0c,0x90,0x41,0x51,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x41,0x54,0x81,0x74,0x80,0x41,
+                        0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,
+                        0x00,0x0c,0x90,0x3e,0x52,0x83,0x67,0x80,0x3e,0x00,0x19,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,
+                        0x00,0x0c,0x90,0x43,0x54,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x41,0x54,0x81,0x74,0x80,0x41,
+                        0x00,0x0c,0x90,0x41,0x55,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,
+                        0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x53,0x83,0x67,0x80,0x3e,
+                        0x00,0x19,0x90,0x3c,0x52,0x81,0x74,0x80,0x3c,0x00,0x0c,0x90,0x3c,0x53,0x81,0x74,0x80,0x3c,
+                        0x00,0x0c,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x53,0x81,0x74,0x80,0x43,
+                        0x00,0x0c,0x90,0x45,0x57,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,0x45,0x51,0x81,0x74,0x80,0x45,
+                        0x00,0x0c,0x90,0x43,0x4f,0x83,0x67,0x80,0x43,0x00,0x19,0x90,0x41,0x51,0x81,0x74,0x80,0x41,
+                        0x00,0x0c,0x90,0x41,0x53,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x51,0x81,0x74,0x80,0x40,
+                        0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x52,0x81,0x74,0x80,0x3e,
+                        0x00,0x0c,0x90,0x3e,0x53,0x81,0x74,0x80,0x3e,0x00,0x0c,0x90,0x3c,0x50,0x83,0x67,0x80,0x3c,
+                        0x00,0x01,0xff,0x2f,0x00};
+
+//// 1 track - 1 note at a time (required - part 3)
+unsigned char song1[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x00,0xf0,0x4d,0x54,0x72,0x6b,
+                        0x00,0x00,0x00,0x37,0x00,0xff,0x51,0x03,0x0a,0x2c,0x2a,0x00,0xff,0x58,0x04,0x04,0x02,0x18,
+                        0x08,0x00,0xff,0x59,0x02,0x01,0x00,0x00,0xff,0x58,0x04,0x06,0x03,0x0c,0x08,0x00,0xff,0x03,
+                        0x12,0x48,0x61,0x72,0x72,0x79,0x20,0x50,0x6f,0x74,0x74,0x65,0x72,0x20,0x54,0x68,0x65,0x6d,
+                        0x65,0x00,0xff,0x2f,0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x02,0x16,0x00,0xff,0x03,0x0a,0x75,
+                        0x6e,0x62,0x65,0x6e,0x61,0x6e,0x6e,0x74,0x31,0x00,0xc0,0x0b,0x00,0xb0,0x07,0x70,0x84,0x58,
+                        0x90,0x47,0x64,0x78,0x80,0x47,0x64,0x00,0x90,0x4c,0x64,0x81,0x34,0x80,0x4c,0x64,0x00,0x90,
+                        0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,0x90,0x4e,0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,
+                        0x81,0x70,0x80,0x4c,0x64,0x00,0x90,0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x51,0x64,0x82,
+                        0x68,0x80,0x51,0x64,0x00,0x90,0x4e,0x64,0x82,0x68,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,0x81,
+                        0x34,0x80,0x4c,0x64,0x00,0x90,0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,0x90,0x4e,0x64,0x78,0x80,
+                        0x4e,0x64,0x00,0x90,0x4a,0x64,0x81,0x70,0x80,0x4a,0x64,0x00,0x90,0x4d,0x64,0x78,0x80,0x4d,
+                        0x64,0x00,0x90,0x47,0x64,0x84,0x58,0x80,0x47,0x64,0x00,0x90,0x47,0x64,0x78,0x80,0x47,0x64,
+                        0x00,0x90,0x4c,0x64,0x81,0x34,0x80,0x4c,0x64,0x00,0x90,0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,
+                        0x90,0x4e,0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,0x81,0x70,0x80,0x4c,0x64,0x00,0x90,
+                        0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x56,0x64,0x81,0x70,0x80,0x56,0x64,0x00,0x90,0x55,
+                        0x64,0x78,0x80,0x55,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,0x50,0x64,
+                        0x78,0x80,0x50,0x64,0x00,0x90,0x54,0x64,0x81,0x34,0x80,0x54,0x64,0x00,0x90,0x53,0x64,0x3c,
+                        0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x4e,0x64,0x81,0x70,0x80,
+                        0x4e,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x4c,0x64,0x84,0x58,0x80,0x4c,
+                        0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,
+                        0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,0x00,
+                        0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,
+                        0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x81,0x70,0x80,0x52,0x64,0x00,0x90,0x4e,
+                        0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4f,0x64,0x81,0x34,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,
+                        0x3c,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x46,0x64,0x81,0x70,
+                        0x80,0x46,0x64,0x00,0x90,0x47,0x64,0x78,0x80,0x47,0x64,0x00,0x90,0x53,0x64,0x84,0x58,0x80,
+                        0x53,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,
+                        0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,
+                        0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x56,0x64,0x81,0x70,0x80,0x56,0x64,0x00,
+                        0x90,0x55,0x64,0x78,0x80,0x55,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,
+                        0x50,0x64,0x78,0x80,0x50,0x64,0x00,0x90,0x54,0x64,0x81,0x34,0x80,0x54,0x64,0x00,0x90,0x53,
+                        0x64,0x3c,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x4e,0x64,0x81,
+                        0x70,0x80,0x4e,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x4c,0x64,0x84,0x58,
+                        0x80,0x4c,0x64,0x00,0xff,0x2f,0x00};
+
+//// 1 track - 3 notes at a time (10% extra credit - part 3)
+unsigned char song2[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x01,0x00,0x4d,0x54,0x72,0x6b,
+                        0x00,0x00,0x00,0x57,0x00,0xff,0x58,0x04,0x04,0x02,0x18,0x08,0x00,0xff,0x59,0x02,0x00,0x00,
+                        0x00,0xff,0x51,0x03,0x09,0xa3,0x19,0x00,0xff,0x03,0x1b,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,
+                        0x20,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,0x20,0x4c,0x69,0x74,0x74,0x6c,0x65,0x20,0x53,0x74,
+                        0x61,0x72,0x00,0xff,0x01,0x0b,0x54,0x72,0x61,0x64,0x69,0x74,0x69,0x6f,0x6e,0x61,0x6c,0x00,
+                        0xff,0x02,0x0c,0x4a,0x69,0x6d,0x20,0x50,0x61,0x74,0x65,0x72,0x73,0x6f,0x6e,0x01,0xff,0x2f,
+                        0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x03,0x2a,0x00,0xc0,0x00,0x00,0xb0,0x79,0x00,0x00,0xb0,
+                        0x40,0x00,0x00,0xb0,0x0a,0x3f,0x00,0xb0,0x07,0x5f,0x00,0x90,0x3c,0x4d,0x00,0x90,0x34,0x3f,
+                        0x00,0xb0,0x79,0x00,0x00,0xb0,0x40,0x00,0x00,0xb0,0x0a,0x3f,0x00,0xb0,0x07,0x5f,0x00,0xff,
+                        0x03,0x05,0x50,0x69,0x61,0x6e,0x6f,0x00,0x90,0x30,0x40,0x81,0x74,0x80,0x3c,0x00,0x0c,0x90,
+                        0x3c,0x53,0x81,0x67,0x80,0x34,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x3c,0x00,0x0c,0x90,0x43,
+                        0x5a,0x00,0x90,0x3c,0x4d,0x00,0x90,0x30,0x47,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x57,
+                        0x81,0x67,0x80,0x3c,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x43,0x00,0x0c,0x90,0x45,0x56,0x00,
+                        0x90,0x3c,0x49,0x00,0x90,0x29,0x42,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,0x45,0x53,0x81,0x67,
+                        0x80,0x3c,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,0x45,0x00,0x0c,0x90,0x43,0x51,0x00,0x90,0x3c,
+                        0x4b,0x00,0x90,0x30,0x47,0x83,0x67,0x80,0x43,0x00,0x00,0x80,0x3c,0x00,0x00,0x80,0x30,0x00,
+                        0x19,0x90,0x41,0x50,0x00,0x90,0x39,0x46,0x00,0x90,0x29,0x44,0x81,0x74,0x80,0x41,0x00,0x0c,
+                        0x90,0x41,0x55,0x81,0x67,0x80,0x39,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,0x41,0x00,0x0c,0x90,
+                        0x40,0x52,0x00,0x90,0x37,0x45,0x00,0x90,0x30,0x4c,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x40,
+                        0x54,0x81,0x67,0x80,0x37,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x40,0x00,0x0c,0x90,0x3e,0x51,
+                        0x00,0x90,0x37,0x47,0x00,0x90,0x2b,0x45,0x81,0x74,0x80,0x3e,0x00,0x0c,0x90,0x3e,0x53,0x81,
+                        0x67,0x80,0x37,0x00,0x00,0x80,0x2b,0x00,0x0d,0x80,0x3e,0x00,0x0c,0x90,0x3c,0x51,0x00,0x90,
+                        0x34,0x47,0x00,0x90,0x30,0x4b,0x83,0x67,0x80,0x3c,0x00,0x00,0x80,0x34,0x00,0x00,0x80,0x30,
+                        0x00,0x19,0x90,0x43,0x5e,0x00,0x90,0x3c,0x50,0x00,0x90,0x30,0x48,0x81,0x74,0x80,0x43,0x00,
+                        0x0c,0x90,0x43,0x53,0x81,0x67,0x80,0x3c,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x43,0x00,0x0c,
+                        0x90,0x41,0x51,0x00,0x90,0x39,0x47,0x00,0x90,0x29,0x44,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,
+                        0x41,0x54,0x81,0x67,0x80,0x39,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,0x41,0x00,0x0c,0x90,0x40,
+                        0x52,0x00,0x90,0x37,0x46,0x00,0x90,0x2b,0x49,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x40,0x54,
+                        0x81,0x67,0x80,0x37,0x00,0x00,0x80,0x2b,0x00,0x0d,0x80,0x40,0x00,0x0c,0x90,0x3e,0x52,0x00,
+                        0x90,0x37,0x43,0x00,0x90,0x2b,0x48,0x83,0x67,0x80,0x3e,0x00,0x00,0x80,0x37,0x00,0x00,0x80,
+                        0x2b,0x00,0x19,0x90,0x43,0x5a,0x00,0x90,0x3c,0x4c,0x00,0x90,0x30,0x49,0x81,0x74,0x80,0x43,
+                        0x00,0x0c,0x90,0x43,0x54,0x81,0x67,0x80,0x3c,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x43,0x00,
+                        0x0c,0x90,0x41,0x54,0x00,0x90,0x39,0x47,0x00,0x90,0x29,0x44,0x81,0x74,0x80,0x41,0x00,0x0c,
+                        0x90,0x41,0x55,0x81,0x67,0x80,0x39,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,0x41,0x00,0x0c,0x90,
+                        0x40,0x52,0x00,0x90,0x37,0x46,0x00,0x90,0x2b,0x49,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x40,
+                        0x52,0x81,0x67,0x80,0x37,0x00,0x00,0x80,0x2b,0x00,0x0d,0x80,0x40,0x00,0x0c,0x90,0x3e,0x53,
+                        0x00,0x90,0x37,0x46,0x00,0x90,0x2b,0x45,0x83,0x67,0x80,0x3e,0x00,0x00,0x80,0x37,0x00,0x00,
+                        0x80,0x2b,0x00,0x19,0x90,0x3c,0x52,0x00,0x90,0x34,0x45,0x00,0x90,0x30,0x49,0x81,0x74,0x80,
+                        0x3c,0x00,0x0c,0x90,0x3c,0x53,0x81,0x67,0x80,0x34,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x3c,
+                        0x00,0x0c,0x90,0x43,0x5a,0x00,0x90,0x3c,0x50,0x00,0x90,0x30,0x48,0x81,0x74,0x80,0x43,0x00,
+                        0x0c,0x90,0x43,0x53,0x81,0x67,0x80,0x3c,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x43,0x00,0x0c,
+                        0x90,0x45,0x57,0x00,0x90,0x3c,0x45,0x00,0x90,0x29,0x44,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,
+                        0x45,0x51,0x81,0x67,0x80,0x3c,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,0x45,0x00,0x0c,0x90,0x43,
+                        0x4f,0x00,0x90,0x3c,0x48,0x00,0x90,0x30,0x49,0x83,0x67,0x80,0x43,0x00,0x00,0x80,0x3c,0x00,
+                        0x00,0x80,0x30,0x00,0x19,0x90,0x41,0x51,0x00,0x90,0x39,0x45,0x00,0x90,0x29,0x44,0x81,0x74,
+                        0x80,0x41,0x00,0x0c,0x90,0x41,0x53,0x81,0x67,0x80,0x39,0x00,0x00,0x80,0x29,0x00,0x0d,0x80,
+                        0x41,0x00,0x0c,0x90,0x40,0x51,0x00,0x90,0x37,0x46,0x00,0x90,0x30,0x4b,0x81,0x74,0x80,0x40,
+                        0x00,0x0c,0x90,0x40,0x54,0x81,0x67,0x80,0x37,0x00,0x00,0x80,0x30,0x00,0x0d,0x80,0x40,0x00,
+                        0x0c,0x90,0x3e,0x52,0x00,0x90,0x37,0x47,0x00,0x90,0x2b,0x45,0x81,0x74,0x80,0x3e,0x00,0x0c,
+                        0x90,0x3e,0x53,0x81,0x67,0x80,0x37,0x00,0x00,0x80,0x2b,0x00,0x0d,0x80,0x3e,0x00,0x0c,0x90,
+                        0x3c,0x50,0x00,0x90,0x34,0x46,0x00,0x90,0x30,0x4a,0x83,0x67,0x80,0x3c,0x00,0x00,0x80,0x34,
+                        0x00,0x00,0x80,0x30,0x00,0x01,0xff,0x2f,0x00};
+
+//// 4 tracks - One note per track (10% extra credit - part 3)
+
+unsigned char song3[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x05,0x01,0x80,0x4d,0x54,0x72,0x6b,
+                        0x00,0x00,0x00,0x36,0x00,0xff,0x58,0x04,0x04,0x02,0x60,0x08,0x00,0xff,0x7f,0x03,0x00,0x00,
+                        0x41,0x00,0xff,0x7f,0x05,0x00,0x00,0x77,0x0e,0x00,0x00,0xff,0x51,0x03,0x0a,0x67,0x5a,0x00,
+                        0xff,0x03,0xf,0x4c,0x65,0x67,0x65,0x6e,0x64,0x20,0x6f,0x66,0x20,0x5a,0x65,0x6c,0x64,0x61,
+                        0x00,0xff,0x2f,0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x04,0x71,0x00,0xb0,0x00,0x00,0x00,0xc0,
+                        0x47,0x00,0xb0,0x07,0x64,0x00,0xff,0x59,0x02,0xfe,0x00,0x00,0x90,0x46,0x64,0x87,0x38,0x80,
+                        0x46,0x64,0x08,0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,
+                        0x41,0x64,0x04,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,0x64,0x04,0x90,0x44,0x64,0x5c,0x80,0x44,
+                        0x64,0x04,0x90,0x42,0x64,0x5c,0x80,0x42,0x64,0x04,0x90,0x44,0x64,0x8a,0x40,0x80,0x44,0x64,
+                        0x00,0x90,0x46,0x64,0x87,0x38,0x80,0x46,0x64,0x08,0x90,0x42,0x64,0x81,0x3c,0x80,0x42,0x64,
+                        0x04,0x90,0x42,0x64,0x81,0x3c,0x80,0x42,0x64,0x04,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,0x64,
+                        0x04,0x90,0x45,0x64,0x5c,0x80,0x45,0x64,0x04,0x90,0x43,0x64,0x5c,0x80,0x43,0x64,0x04,0x90,
+                        0x45,0x64,0x8a,0x40,0x80,0x45,0x64,0x00,0x90,0x31,0x64,0x82,0x7c,0x80,0x31,0x64,0x89,0x04,
+                        0x90,0x31,0x64,0x82,0x7c,0x80,0x31,0x64,0x89,0x04,0x90,0x46,0x64,0x82,0x1c,0x80,0x46,0x64,
+                        0x64,0x90,0x41,0x64,0x82,0x78,0x80,0x41,0x64,0x81,0x48,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,
+                        0x64,0x04,0x90,0x46,0x64,0x5c,0x80,0x46,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,0x04,
+                        0x90,0x4a,0x64,0x5c,0x80,0x4a,0x64,0x04,0x90,0x4b,0x64,0x5c,0x80,0x4b,0x64,0x04,0x90,0x4d,
+                        0x64,0x82,0x1c,0x80,0x4d,0x64,0x89,0x64,0x90,0x46,0x64,0x82,0x1c,0x80,0x46,0x64,0x64,0x90,
+                        0x41,0x64,0x82,0x78,0x80,0x41,0x64,0x81,0x48,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,0x64,0x04,
+                        0x90,0x46,0x64,0x5c,0x80,0x46,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,0x04,0x90,0x4a,
+                        0x64,0x5c,0x80,0x4a,0x64,0x04,0x90,0x4b,0x64,0x5c,0x80,0x4b,0x64,0x04,0x90,0x4d,0x64,0x82,
+                        0x1c,0x80,0x4d,0x64,0x89,0x64,0x90,0x46,0x64,0x82,0x7c,0x80,0x46,0x64,0x04,0x90,0x41,0x64,
+                        0x84,0x3c,0x80,0x41,0x64,0x04,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,0x64,0x04,0x90,0x46,0x64,
+                        0x5c,0x80,0x46,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,0x04,0x90,0x4a,0x64,0x5c,0x80,
+                        0x4a,0x64,0x04,0x90,0x4b,0x64,0x5c,0x80,0x4b,0x64,0x04,0x90,0x4d,0x64,0x87,0x38,0x80,0x4d,
+                        0x64,0x08,0x90,0x4d,0x64,0x81,0x3c,0x80,0x4d,0x64,0x04,0x90,0x4d,0x64,0x7c,0x80,0x4d,0x64,
+                        0x04,0x90,0x4e,0x64,0x7c,0x80,0x4e,0x64,0x04,0x90,0x50,0x64,0x7c,0x80,0x50,0x64,0x04,0x90,
+                        0x52,0x64,0x87,0x78,0x80,0x52,0x64,0x08,0x90,0x52,0x64,0x7c,0x80,0x52,0x64,0x04,0x90,0x52,
+                        0x64,0x7c,0x80,0x52,0x64,0x04,0x90,0x50,0x64,0x7c,0x80,0x50,0x64,0x04,0x90,0x4e,0x64,0x7c,
+                        0x80,0x4e,0x64,0x04,0x90,0x50,0x64,0x81,0x7c,0x80,0x50,0x64,0x04,0x90,0x4e,0x64,0x7c,0x80,
+                        0x4e,0x64,0x04,0x90,0x4d,0x64,0x85,0x7c,0x80,0x4d,0x64,0x04,0x90,0x4d,0x64,0x82,0x7c,0x80,
+                        0x4d,0x64,0x04,0x90,0x4b,0x64,0x81,0x3c,0x80,0x4b,0x64,0x04,0x90,0x4b,0x64,0x5c,0x80,0x4b,
+                        0x64,0x04,0x90,0x4d,0x64,0x5c,0x80,0x4d,0x64,0x04,0x90,0x4e,0x64,0x85,0x7c,0x80,0x4e,0x64,
+                        0x04,0x90,0x4d,0x64,0x81,0x3c,0x80,0x4d,0x64,0x04,0x90,0x4b,0x64,0x81,0x3c,0x80,0x4b,0x64,
+                        0x04,0x90,0x49,0x64,0x81,0x3c,0x80,0x49,0x64,0x04,0x90,0x49,0x64,0x5c,0x80,0x49,0x64,0x04,
+                        0x90,0x4b,0x64,0x5c,0x80,0x4b,0x64,0x04,0x90,0x4d,0x64,0x85,0x7c,0x80,0x4d,0x64,0x04,0x90,
+                        0x4b,0x64,0x81,0x3c,0x80,0x4b,0x64,0x04,0x90,0x49,0x64,0x81,0x3c,0x80,0x49,0x64,0x04,0x90,
+                        0x48,0x64,0x81,0x3c,0x80,0x48,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,0x04,0x90,0x4a,
+                        0x64,0x5c,0x80,0x4a,0x64,0x04,0x90,0x4c,0x64,0x85,0x7c,0x80,0x4c,0x64,0x04,0x90,0x4f,0x64,
+                        0x82,0x7c,0x80,0x4f,0x64,0x04,0x90,0x4d,0x64,0x81,0x3c,0x80,0x4d,0x64,0x04,0x90,0x41,0x64,
+                        0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,
+                        0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,
+                        0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,
+                        0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x04,
+                        0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x04,0x90,0x46,0x64,0x82,0x7c,0x80,0x46,0x64,0x04,
+                        0x90,0x41,0x64,0x84,0x3c,0x80,0x41,0x64,0x04,0x90,0x46,0x64,0x81,0x3c,0x80,0x46,0x64,0x04,
+                        0x90,0x46,0x64,0x5c,0x80,0x46,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,0x04,0x90,0x4a,
+                        0x64,0x5c,0x80,0x4a,0x64,0x04,0x90,0x4b,0x64,0x5c,0x80,0x4b,0x64,0x04,0x90,0x4d,0x64,0x87,
+                        0x38,0x80,0x4d,0x64,0x08,0x90,0x4d,0x64,0x81,0x3c,0x80,0x4d,0x64,0x04,0x90,0x4d,0x64,0x7c,
+                        0x80,0x4d,0x64,0x04,0x90,0x4e,0x64,0x7c,0x80,0x4e,0x64,0x04,0x90,0x50,0x64,0x7c,0x80,0x50,
+                        0x64,0x04,0x90,0x52,0x64,0x88,0x7c,0x80,0x52,0x64,0x04,0x90,0x55,0x64,0x82,0x7c,0x80,0x55,
+                        0x64,0x04,0x90,0x54,0x64,0x82,0x7c,0x80,0x54,0x64,0x04,0x90,0x51,0x64,0x85,0x7c,0x80,0x51,
+                        0x64,0x04,0x90,0x4d,0x64,0x82,0x7c,0x80,0x4d,0x64,0x04,0x90,0x4e,0x64,0x88,0x7c,0x80,0x4e,
+                        0x64,0x04,0x90,0x52,0x64,0x82,0x7c,0x80,0x52,0x64,0x04,0x90,0x51,0x64,0x82,0x7c,0x80,0x51,
+                        0x64,0x04,0x90,0x4d,0x64,0x85,0x7c,0x80,0x4d,0x64,0x04,0x90,0x4d,0x64,0x82,0x7c,0x80,0x4d,
+                        0x64,0x04,0x90,0x4e,0x64,0x88,0x7c,0x80,0x4e,0x64,0x04,0x90,0x52,0x64,0x82,0x7c,0x80,0x52,
+                        0x64,0x04,0x90,0x51,0x64,0x82,0x7c,0x80,0x51,0x64,0x04,0x90,0x4d,0x64,0x85,0x7c,0x80,0x4d,
+                        0x64,0x04,0x90,0x4a,0x64,0x82,0x7c,0x80,0x4a,0x64,0x04,0x90,0x4b,0x64,0x88,0x7c,0x80,0x4b,
+                        0x64,0x04,0x90,0x4e,0x64,0x82,0x7c,0x80,0x4e,0x64,0x04,0x90,0x4d,0x64,0x82,0x7c,0x80,0x4d,
+                        0x64,0x04,0x90,0x49,0x64,0x85,0x7c,0x80,0x49,0x64,0x04,0x90,0x46,0x64,0x82,0x7c,0x80,0x46,
+                        0x64,0x04,0x90,0x48,0x64,0x81,0x3c,0x80,0x48,0x64,0x04,0x90,0x48,0x64,0x5c,0x80,0x48,0x64,
+                        0x04,0x90,0x4a,0x64,0x5c,0x80,0x4a,0x64,0x04,0x90,0x4c,0x64,0x85,0x7c,0x80,0x4c,0x64,0x04,
+                        0x90,0x4f,0x64,0x82,0x7c,0x80,0x4f,0x64,0x04,0x90,0x4d,0x64,0x81,0x3c,0x80,0x4d,0x64,0x04,
+                        0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,
+                        0x64,0x81,0x3c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,
+                        0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,
+                        0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x5c,0x80,0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,
+                        0x41,0x64,0x04,0x90,0x41,0x64,0x81,0x3c,0x80,0x41,0x64,0x00,0xff,0x2f,0x00,0x4d,0x54,0x72,
+                        0x6b,0x00,0x00,0x08,0x13,0x00,0xb1,0x00,0x00,0x00,0xc1,0x47,0x00,0xb1,0x07,0x64,0x00,0xff,
+                        0x59,0x02,0xfe,0x00,0x08,0x91,0x46,0x64,0x87,0x38,0x81,0x46,0x64,0x08,0x91,0x41,0x64,0x81,
+                        0x3c,0x81,0x41,0x64,0x04,0x91,0x41,0x64,0x81,0x3c,0x81,0x41,0x64,0x04,0x91,0x46,0x64,0x81,
+                        0x3c,0x81,0x46,0x64,0x04,0x91,0x44,0x64,0x5c,0x81,0x44,0x64,0x04,0x91,0x42,0x64,0x5c,0x81,
+                        0x42,0x64,0x04,0x91,0x44,0x64,0x8a,0x40,0x81,0x44,0x64,0x00,0x91,0x46,0x64,0x87,0x38,0x81,
+                        0x46,0x64,0x08,0x91,0x42,0x64,0x81,0x3c,0x81,0x42,0x64,0x04,0x91,0x42,0x64,0x81,0x3c,0x81,
+                        0x42,0x64,0x04,0x91,0x46,0x64,0x81,0x3c,0x81,0x46,0x64,0x04,0x91,0x45,0x64,0x5c,0x81,0x45,
+                        0x64,0x04,0x91,0x43,0x64,0x5c,0x81,0x43,0x64,0x04,0x91,0x45,0x64,0x8a,0x38,0x91,0x35,0x64,
+                        0x08,0x81,0x45,0x64,0x81,0x34,0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,
+                        0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x81,0x3c,0x81,0x35,0x64,0x04,0x91,
+                        0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,
+                        0x81,0x3c,0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,
+                        0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,
+                        0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,
+                        0x91,0x35,0x64,0x81,0x3c,0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,
+                        0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x81,0x3c,0x81,0x35,0x64,0x04,0x91,0x35,
+                        0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x81,
+                        0x3c,0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,
+                        0x2e,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,
+                        0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,
+                        0x35,0x64,0x81,0x3c,0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,
+                        0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x81,0x3c,0x81,0x35,0x64,0x04,0x91,0x35,0x64,
+                        0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x35,0x64,0x81,0x3c,
+                        0x81,0x35,0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,
+                        0x64,0x04,0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,
+                        0x91,0x35,0x64,0x5c,0x81,0x35,0x64,0x04,0x91,0x2e,0x64,0x5c,0x81,0x2e,0x64,0x04,0x91,0x33,
+                        0x64,0x81,0x3c,0x81,0x33,0x64,0x04,0x91,0x3a,0x64,0x81,0x3c,0x81,0x3a,0x64,0x04,0x91,0x3a,
+                        0x64,0x5c,0x81,0x3a,0x64,0x04,0x91,0x3c,0x64,0x5c,0x81,0x3c,0x64,0x04,0x91,0x3e,0x64,0x5c,
+                        0x81,0x3e,0x64,0x04,0x91,0x3f,0x64,0x5c,0x81,0x3f,0x64,0x04,0x91,0x41,0x64,0x81,0x3c,0x81,
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+                        0x81,0x3c,0x89,0x2a,0x64,0x04,0x99,0x2a,0x64,0x5c,0x89,0x2a,0x64,0x04,0x99,0x2a,0x64,0x5c,
+                        0x89,0x2a,0x64,0x04,0x99,0x2a,0x64,0x81,0x3c,0x89,0x2a,0x64,0x04,0x99,0x2a,0x64,0x5c,0x89,
+                        0x2a,0x64,0x04,0x99,0x2a,0x64,0x5c,0x89,0x2a,0x64,0x00,0xff,0x2f,0x00};
+
+//// 3 tracks (no meta track) - lots of notes per track (5% extra credit - part 3)
+unsigned char song4[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x03,0x01,0x80,0x4d,0x54,0x72,0x6b,
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+                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x43,
+                        0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,
+                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x43,
+                        0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,
+                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x88,0x20,0x82,0x48,0x00,0x00,0xff,0x2f,
+                        0x00};
+
+// Convenience list of all the songs in one array.
+song songs[] = {{song0, sizeof (song0)}, {song1, sizeof (song1)}, {song2, sizeof (song2)}, {song3, sizeof (song3)},
+				{song4, sizeof (song4)}};
+
+song get_song (uint8_t song_number){
+	return songs[song_number];
+}
diff --git a/project/Core/Src/Project/tone.c b/project/Core/Src/Project/tone.c
new file mode 100644
index 0000000..a0d1cb0
--- /dev/null
+++ b/project/Core/Src/Project/tone.c
@@ -0,0 +1,83 @@
+/*
+ * tone.c
+ *
+ *  Created on: May 14, 2022
+ *      Author: bruce
+ */
+
+
+#include "tone.h"
+
+#define CPU_SPEED (80000000.0)
+#define MAX_TONES (1)
+
+static float notes[] = {
+/* Octave -1 */			   8.18,    8.66,    9.18,    9.73,   10.30,   10.92,   11.56,   12.25,   12.98,   13.75,   14.57,   13.44,
+/* Octave  0 */           16.35,   17.32,   18.35,   19.45,   20.60,   21.83,   23.12,   24.50,   25.96,   27.50,   29.14,   30.87,
+/* Octave  1 */  	      32.70,   34.65,   36.71,   38.89,   41.20,   43.65,   46.25,   49.00,   51.91,   55.00,   58.27,   61.74,
+/* Octave  2 */			  65.41,   69.30,   73.42,   77.78,   82.41,   87.31,   92.50,   98.00,  103.83,  110.00,  116.54,  123.47,
+/* Octave  3 */			 130.81,  138.59,  146.83,  155.56,  164.81,  174.61,  185.00,  196.00,  207.65,  220.00,  233.08,  246.94,
+/* Octave  4 */			 261.63,  277.18,  293.66,  311.13,  329.63,  349.23,  369.99,  392.00,  415.30,  440.00,  466.16,  493.88,
+/* Octave  5 */          523.25,  554.37,  587.33,  622.25,  659.25,  698.46,  739.99,  783.99,  830.61,  880.00,  932.33,  987.77,
+/* Octave  6 */         1046.50, 1108.73, 1174.66, 1244.51, 1318.51, 1396.91, 1479.98, 1567.98, 1661.22, 1760.00, 1864.66, 1975.53,
+/* Octave  7 */         2093.00, 2217.46, 2349.32, 2489.02, 2637.02, 2793.83, 2959.96, 3135.96, 3322.44, 3520.00, 3729.31, 3951.07,
+/* Octave  8 */         4186.01, 4434.92, 4698.63, 4978.03, 5274.04, 5587.65, 5919.91, 6271.93, 6644.88, 7040.00, 7458.62, 7902.13,
+/* Octave  9 */         8372.02, 8869.84, 9397.26, 9956.06,10548.08,11175.30,11839.82,12543.86};
+
+typedef struct {
+	uint32_t duration;
+	uint16_t power;
+} tone_info;
+
+static uint32_t counter = 0;
+
+static tone_info tones[MAX_TONES] = {{0,0}};
+
+/* You will want to integrate this with your existing one
+   but it is here for standalone testing                 
+*/
+//void SysTick_Handler() {
+//	counter++;
+//}
+
+uint32_t get_tick_speed ();
+
+
+// Convert from hertz to ticks
+uint32_t hertz_to_systicks (float hertz) {
+	float ticks_per_second = CPU_SPEED / (SysTick->LOAD + 1);
+	if (hertz == 0)
+		return 0;
+	float duration = 1 / hertz;
+	return (uint32_t) (duration * ticks_per_second);
+}
+
+// Accessor for the counter
+uint32_t get_counter () {
+	return counter;
+}
+
+void reset_counter () {
+	counter = 0;
+}
+
+// Add a tone to the tones array
+uint8_t add_tone (uint8_t note, uint8_t velocity) {
+	tones [0] = (tone_info){hertz_to_systicks (notes [note]), velocity};
+	return 0;
+}
+
+// Remove a tone from the tones array
+uint8_t remove_tone (uint8_t note) {
+	tones [0].duration = hertz_to_systicks (notes [note]);
+	tones [0].power = 0;
+	return 0;
+}
+
+// Play any tones in the array
+void play_tones () {
+
+}
+
+
+
diff --git a/project/Core/Src/SysClock.c b/project/Core/Src/SysClock.c
deleted file mode 100644
index da98c17..0000000
--- a/project/Core/Src/SysClock.c
+++ /dev/null
@@ -1,103 +0,0 @@
-#include "SysClock.h"
-
-//******************************************************************************************
-// Switch the PLL source from MSI to HSI, and select the PLL as SYSCLK source.
-//******************************************************************************************
-void System_Clock_Init(void){
-	
-	uint32_t HSITrim;
-
-	// To correctly read data from FLASH memory, the number of wait states (LATENCY)
-  // must be correctly programmed according to the frequency of the CPU clock
-  // (HCLK) and the supply voltage of the device.		
-	FLASH->ACR &= ~FLASH_ACR_LATENCY;
-	FLASH->ACR |=  FLASH_ACR_LATENCY_2WS;
-		
-	// Enable the Internal High Speed oscillator (HSI
-	RCC->CR |= RCC_CR_HSION;
-	while((RCC->CR & RCC_CR_HSIRDY) == 0);
-	// Adjusts the Internal High Speed oscillator (HSI) calibration value
-	// RC oscillator frequencies are factory calibrated by ST for 1 % accuracy at 25oC
-	// After reset, the factory calibration value is loaded in HSICAL[7:0] of RCC_ICSCR	
-	HSITrim = 16; // user-programmable trimming value that is added to HSICAL[7:0] in ICSCR.
-	RCC->ICSCR &= ~RCC_ICSCR_HSITRIM;
-	RCC->ICSCR |= HSITrim << 24;
-	
-	RCC->CR    &= ~RCC_CR_PLLON; 
-	while((RCC->CR & RCC_CR_PLLRDY) == RCC_CR_PLLRDY);
-	
-	// Select clock source to PLL
-	RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLSRC;
-	RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSI; // 00 = No clock, 01 = MSI, 10 = HSI, 11 = HSE
-	
-	// Make PLL as 80 MHz
-	// f(VCO clock) = f(PLL clock input) * (PLLN / PLLM) = 16MHz * 20/2 = 160 MHz
-	// f(PLL_R) = f(VCO clock) / PLLR = 160MHz/2 = 80MHz
-	RCC->PLLCFGR = (RCC->PLLCFGR & ~RCC_PLLCFGR_PLLN) | 20U << 8;
-	RCC->PLLCFGR = (RCC->PLLCFGR & ~RCC_PLLCFGR_PLLM) | 1U << 4; // 000: PLLM = 1, 001: PLLM = 2, 010: PLLM = 3, 011: PLLM = 4, 100: PLLM = 5, 101: PLLM = 6, 110: PLLM = 7, 111: PLLM = 8
-
-	RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLR;  // 00: PLLR = 2, 01: PLLR = 4, 10: PLLR = 6, 11: PLLR = 8	
-	RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // Enable Main PLL PLLCLK output 
-
-	RCC->CR   |= RCC_CR_PLLON; 
-	while((RCC->CR & RCC_CR_PLLRDY) == 0);
-	
-	// Select PLL selected as system clock
-	RCC->CFGR &= ~RCC_CFGR_SW;
-	RCC->CFGR |= RCC_CFGR_SW_PLL; // 00: MSI, 01:HSI, 10: HSE, 11: PLL
-	
-	// Wait until System Clock has been selected
-	while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
-	
-	// The maximum frequency of the AHB, the APB1 and the APB2 domains is 80 MHz.
-	RCC->CFGR &= ~RCC_CFGR_HPRE;  // AHB prescaler = 1; SYSCLK not divided
-	RCC->CFGR &= ~RCC_CFGR_PPRE1; // APB high-speed prescaler (APB1) = 1, HCLK not divided
-	RCC->CFGR &= ~RCC_CFGR_PPRE2; // APB high-speed prescaler (APB2) = 1, HCLK not divided
-	
-	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLM;
-	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLN;
-	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLP; 
-	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLQ;	
-	// RCC->PLLCFGR |= RCC_PLLCFGR_PLLPEN; // Enable Main PLL PLLSAI3CLK output enable
-	// RCC->PLLCFGR |= RCC_PLLCFGR_PLLQEN; // Enable Main PLL PLL48M1CLK output enable
-	
-	RCC->CR &= ~RCC_CR_PLLSAI1ON;  // SAI1 PLL enable
-	while ( (RCC->CR & RCC_CR_PLLSAI1ON) == RCC_CR_PLLSAI1ON );
-	
-	// Configure and enable PLLSAI1 clock to generate 11.294MHz 
-	// 8 MHz * 24 / 17 = 11.294MHz
-	// f(VCOSAI1 clock) = f(PLL clock input) *  (PLLSAI1N / PLLM)
-	// PLLSAI1CLK: f(PLLSAI1_P) = f(VCOSAI1 clock) / PLLSAI1P
-	// PLLUSB2CLK: f(PLLSAI1_Q) = f(VCOSAI1 clock) / PLLSAI1Q
-	// PLLADC1CLK: f(PLLSAI1_R) = f(VCOSAI1 clock) / PLLSAI1R
-	RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1N;
-	RCC->PLLSAI1CFGR |= 24U<<8;
-	
-	// SAI1PLL division factor for PLLSAI1CLK
-	// 0: PLLSAI1P = 7, 1: PLLSAI1P = 17
-	RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1P;
-	RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1PEN;
-	
-	// SAI1PLL division factor for PLL48M2CLK (48 MHz clock)
-	// RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1Q;
-	// RCC->PLLSAI1CFGR |= U<<21;
-	// RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1QEN;
-	
-	// PLLSAI1 division factor for PLLADC1CLK (ADC clock)
-	// 00: PLLSAI1R = 2, 01: PLLSAI1R = 4, 10: PLLSAI1R = 6, 11: PLLSAI1R = 8
-	// RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1R; 
-	// RCC->PLLSAI1CFGR |= U<<25;
-	// RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1REN;
-	
-	RCC->CR |= RCC_CR_PLLSAI1ON;  // SAI1 PLL enable
-	while ( (RCC->CR & RCC_CR_PLLSAI1ON) == 0);
-	
-	// SAI1 clock source selection
-	// 00: PLLSAI1 "P" clock (PLLSAI1CLK) selected as SAI1 clock
-	// 01: PLLSAI2 "P" clock (PLLSAI2CLK) selected as SAI1 clock
-	// 10: PLL "P" clock (PLLSAI3CLK) selected as SAI1 clock
-	// 11: External input SAI1_EXTCLK selected as SAI1 clock	
-	RCC->CCIPR &= ~RCC_CCIPR_SAI1SEL;
-
-	RCC->APB2ENR |= RCC_APB2ENR_SAI1EN;
-}
diff --git a/project/Core/Src/System/SysClock.c b/project/Core/Src/System/SysClock.c
new file mode 100644
index 0000000..da98c17
--- /dev/null
+++ b/project/Core/Src/System/SysClock.c
@@ -0,0 +1,103 @@
+#include "SysClock.h"
+
+//******************************************************************************************
+// Switch the PLL source from MSI to HSI, and select the PLL as SYSCLK source.
+//******************************************************************************************
+void System_Clock_Init(void){
+	
+	uint32_t HSITrim;
+
+	// To correctly read data from FLASH memory, the number of wait states (LATENCY)
+  // must be correctly programmed according to the frequency of the CPU clock
+  // (HCLK) and the supply voltage of the device.		
+	FLASH->ACR &= ~FLASH_ACR_LATENCY;
+	FLASH->ACR |=  FLASH_ACR_LATENCY_2WS;
+		
+	// Enable the Internal High Speed oscillator (HSI
+	RCC->CR |= RCC_CR_HSION;
+	while((RCC->CR & RCC_CR_HSIRDY) == 0);
+	// Adjusts the Internal High Speed oscillator (HSI) calibration value
+	// RC oscillator frequencies are factory calibrated by ST for 1 % accuracy at 25oC
+	// After reset, the factory calibration value is loaded in HSICAL[7:0] of RCC_ICSCR	
+	HSITrim = 16; // user-programmable trimming value that is added to HSICAL[7:0] in ICSCR.
+	RCC->ICSCR &= ~RCC_ICSCR_HSITRIM;
+	RCC->ICSCR |= HSITrim << 24;
+	
+	RCC->CR    &= ~RCC_CR_PLLON; 
+	while((RCC->CR & RCC_CR_PLLRDY) == RCC_CR_PLLRDY);
+	
+	// Select clock source to PLL
+	RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLSRC;
+	RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSI; // 00 = No clock, 01 = MSI, 10 = HSI, 11 = HSE
+	
+	// Make PLL as 80 MHz
+	// f(VCO clock) = f(PLL clock input) * (PLLN / PLLM) = 16MHz * 20/2 = 160 MHz
+	// f(PLL_R) = f(VCO clock) / PLLR = 160MHz/2 = 80MHz
+	RCC->PLLCFGR = (RCC->PLLCFGR & ~RCC_PLLCFGR_PLLN) | 20U << 8;
+	RCC->PLLCFGR = (RCC->PLLCFGR & ~RCC_PLLCFGR_PLLM) | 1U << 4; // 000: PLLM = 1, 001: PLLM = 2, 010: PLLM = 3, 011: PLLM = 4, 100: PLLM = 5, 101: PLLM = 6, 110: PLLM = 7, 111: PLLM = 8
+
+	RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLR;  // 00: PLLR = 2, 01: PLLR = 4, 10: PLLR = 6, 11: PLLR = 8	
+	RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // Enable Main PLL PLLCLK output 
+
+	RCC->CR   |= RCC_CR_PLLON; 
+	while((RCC->CR & RCC_CR_PLLRDY) == 0);
+	
+	// Select PLL selected as system clock
+	RCC->CFGR &= ~RCC_CFGR_SW;
+	RCC->CFGR |= RCC_CFGR_SW_PLL; // 00: MSI, 01:HSI, 10: HSE, 11: PLL
+	
+	// Wait until System Clock has been selected
+	while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
+	
+	// The maximum frequency of the AHB, the APB1 and the APB2 domains is 80 MHz.
+	RCC->CFGR &= ~RCC_CFGR_HPRE;  // AHB prescaler = 1; SYSCLK not divided
+	RCC->CFGR &= ~RCC_CFGR_PPRE1; // APB high-speed prescaler (APB1) = 1, HCLK not divided
+	RCC->CFGR &= ~RCC_CFGR_PPRE2; // APB high-speed prescaler (APB2) = 1, HCLK not divided
+	
+	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLM;
+	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLN;
+	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLP; 
+	// RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLQ;	
+	// RCC->PLLCFGR |= RCC_PLLCFGR_PLLPEN; // Enable Main PLL PLLSAI3CLK output enable
+	// RCC->PLLCFGR |= RCC_PLLCFGR_PLLQEN; // Enable Main PLL PLL48M1CLK output enable
+	
+	RCC->CR &= ~RCC_CR_PLLSAI1ON;  // SAI1 PLL enable
+	while ( (RCC->CR & RCC_CR_PLLSAI1ON) == RCC_CR_PLLSAI1ON );
+	
+	// Configure and enable PLLSAI1 clock to generate 11.294MHz 
+	// 8 MHz * 24 / 17 = 11.294MHz
+	// f(VCOSAI1 clock) = f(PLL clock input) *  (PLLSAI1N / PLLM)
+	// PLLSAI1CLK: f(PLLSAI1_P) = f(VCOSAI1 clock) / PLLSAI1P
+	// PLLUSB2CLK: f(PLLSAI1_Q) = f(VCOSAI1 clock) / PLLSAI1Q
+	// PLLADC1CLK: f(PLLSAI1_R) = f(VCOSAI1 clock) / PLLSAI1R
+	RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1N;
+	RCC->PLLSAI1CFGR |= 24U<<8;
+	
+	// SAI1PLL division factor for PLLSAI1CLK
+	// 0: PLLSAI1P = 7, 1: PLLSAI1P = 17
+	RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1P;
+	RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1PEN;
+	
+	// SAI1PLL division factor for PLL48M2CLK (48 MHz clock)
+	// RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1Q;
+	// RCC->PLLSAI1CFGR |= U<<21;
+	// RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1QEN;
+	
+	// PLLSAI1 division factor for PLLADC1CLK (ADC clock)
+	// 00: PLLSAI1R = 2, 01: PLLSAI1R = 4, 10: PLLSAI1R = 6, 11: PLLSAI1R = 8
+	// RCC->PLLSAI1CFGR &= ~RCC_PLLSAI1CFGR_PLLSAI1R; 
+	// RCC->PLLSAI1CFGR |= U<<25;
+	// RCC->PLLSAI1CFGR |= RCC_PLLSAI1CFGR_PLLSAI1REN;
+	
+	RCC->CR |= RCC_CR_PLLSAI1ON;  // SAI1 PLL enable
+	while ( (RCC->CR & RCC_CR_PLLSAI1ON) == 0);
+	
+	// SAI1 clock source selection
+	// 00: PLLSAI1 "P" clock (PLLSAI1CLK) selected as SAI1 clock
+	// 01: PLLSAI2 "P" clock (PLLSAI2CLK) selected as SAI1 clock
+	// 10: PLL "P" clock (PLLSAI3CLK) selected as SAI1 clock
+	// 11: External input SAI1_EXTCLK selected as SAI1 clock	
+	RCC->CCIPR &= ~RCC_CCIPR_SAI1SEL;
+
+	RCC->APB2ENR |= RCC_APB2ENR_SAI1EN;
+}
diff --git a/project/Core/Src/System/error_handler.c b/project/Core/Src/System/error_handler.c
new file mode 100644
index 0000000..627abed
--- /dev/null
+++ b/project/Core/Src/System/error_handler.c
@@ -0,0 +1,9 @@
+#include "error_handler.h"
+
+/**
+ * Error handler that is called by lower level functions. 
+ * Add an implementation if desired.
+*/
+void Error_Handler () {
+	
+}
\ No newline at end of file
diff --git a/project/Core/Src/System/syscalls.c b/project/Core/Src/System/syscalls.c
new file mode 100644
index 0000000..4ec9584
--- /dev/null
+++ b/project/Core/Src/System/syscalls.c
@@ -0,0 +1,159 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+//#undef errno
+extern int errno;
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+register char * stack_ptr asm("sp");
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+	return 1;
+}
+
+int _kill(int pid, int sig)
+{
+	errno = EINVAL;
+	return -1;
+}
+
+void _exit (int status)
+{
+	_kill(status, -1);
+	while (1) {}		/* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+	int DataIdx;
+
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+	{
+		*ptr++ = __io_getchar();
+	}
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+	int DataIdx;
+
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+	{
+		__io_putchar(*ptr++);
+	}
+	return len;
+}
+
+int _close(int file)
+{
+	return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _isatty(int file)
+{
+	return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+	return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+	/* Pretend like we always fail */
+	return -1;
+}
+
+int _wait(int *status)
+{
+	errno = ECHILD;
+	return -1;
+}
+
+int _unlink(char *name)
+{
+	errno = ENOENT;
+	return -1;
+}
+
+int _times(struct tms *buf)
+{
+	return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _link(char *old, char *new)
+{
+	errno = EMLINK;
+	return -1;
+}
+
+int _fork(void)
+{
+	errno = EAGAIN;
+	return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+	errno = ENOMEM;
+	return -1;
+}
diff --git a/project/Core/Src/System/sysmem.c b/project/Core/Src/System/sysmem.c
new file mode 100644
index 0000000..d7cc52c
--- /dev/null
+++ b/project/Core/Src/System/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/project/Core/Src/System/system_stm32l4xx.c b/project/Core/Src/System/system_stm32l4xx.c
new file mode 100644
index 0000000..ab94a2c
--- /dev/null
+++ b/project/Core/Src/System/system_stm32l4xx.c
@@ -0,0 +1,337 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32l4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32l4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the MSI (4 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | MSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 4000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 4000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 8
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_P                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_Q                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_R                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI2_P                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI2_Q                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI2_R                              | NA
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Disabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Apache License, Version 2.0,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/Apache-2.0
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32l4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32L4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32l4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    8000000U  /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (MSI_VALUE)
+  #define MSI_VALUE    4000000U  /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = 4000000U;
+
+  const uint8_t  AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t  APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+  const uint32_t MSIRangeTable[12] = {100000U,   200000U,   400000U,   800000U,  1000000U,  2000000U, \
+                                      4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set MSION bit */
+  RCC->CR |= RCC_CR_MSION;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000U;
+
+  /* Reset HSEON, CSSON , HSION, and PLLON bits */
+  RCC->CR &= 0xEAF6FFFFU;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x00001000U;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= 0xFFFBFFFFU;
+
+  /* Disable all interrupts */
+  RCC->CIER = 0x00000000U;
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
+
+  /* Get MSI Range frequency--------------------------------------------------*/
+  if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
+  { /* MSISRANGE from RCC_CSR applies */
+    msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
+  }
+  else
+  { /* MSIRANGE from RCC_CR applies */
+    msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
+  }
+  /*MSI frequency range in HZ*/
+  msirange = MSIRangeTable[msirange];
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x00:  /* MSI used as system clock source */
+      SystemCoreClock = msirange;
+      break;
+
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
+
+      switch (pllsource)
+      {
+        case 0x02:  /* HSI used as PLL clock source */
+          pllvco = (HSI_VALUE / pllm);
+          break;
+
+        case 0x03:  /* HSE used as PLL clock source */
+          pllvco = (HSE_VALUE / pllm);
+          break;
+
+        default:    /* MSI used as PLL clock source */
+          pllvco = (msirange / pllm);
+          break;
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      SystemCoreClock = msirange;
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Src/System/systick.c b/project/Core/Src/System/systick.c
new file mode 100644
index 0000000..263defd
--- /dev/null
+++ b/project/Core/Src/System/systick.c
@@ -0,0 +1,23 @@
+#include "systick.h"
+
+// This function is to Initialize SysTick registers
+void init_systick()
+{
+	// Use the SysTick global structure pointer to do the following in this
+	// exact order with separate lines for each step:
+	//
+	// Disable SysTick by clearing the CTRL (CSR) register.
+	// Set the LOAD (RVR) to 8 million to give us a 100 milliseconds timer.
+	// Set the clock source bit in the CTRL (CSR) to the internal clock.
+	// Set the enable bit in the CTRL (CSR) to start the timer.
+}
+
+// This fuction is to create delay using SysTick timer counter
+void delay_systick()
+{
+	// Using the SysTick global structure pointer do the following:
+	// Create a for loop that loops 10 times
+	// Inside that for loop check the COUNTFLAG bit in the CTRL (CSR)
+	// register in a loop. When that bit is set exit this inner loop
+	// to do another pass in the outer loop of 10.
+}
diff --git a/project/Core/Src/UART.c b/project/Core/Src/UART.c
deleted file mode 100644
index b1eb30c..0000000
--- a/project/Core/Src/UART.c
+++ /dev/null
@@ -1,152 +0,0 @@
-#include "UART.h"
-
-
-// UART Ports:
-// ===================================================
-// PA.2 = USART2_TX (AF7)  
-// PA.3 = USART2_RX (AF7)
-
-#define TX_PIN 2
-#define RX_PIN 3
-
-void UART2_Init(void) {
-	// Enable the clock of USART 1 & 2
-	RCC->APB1ENR1 |= RCC_APB1ENR1_USART2EN;  // Enable USART 2 clock		
-	
-	// Select the USART1 clock source
-	// 00: PCLK selected as USART2 clock
-	// 01: System clock (SYSCLK) selected as USART2 clock
-	// 10: HSI16 clock selected as USART2 clock
-	// 11: LSE clock selected as USART2 clock
-	RCC->CCIPR &= ~RCC_CCIPR_USART2SEL;
-	RCC->CCIPR |=  RCC_CCIPR_USART2SEL_0;
-	
-	UART2_GPIO_Init();
-	USART_Init(USART2);
-	
-	//NVIC_SetPriority(USART2_IRQn, 0);			// Set Priority to 1
-	//NVIC_EnableIRQ(USART2_IRQn);					// Enable interrupt of USART1 peripheral
-}
-
-void UART2_GPIO_Init(void) {
-	
-	// Enable the peripheral clock of GPIO Port
-	RCC->AHB2ENR |=   RCC_AHB2ENR_GPIOAEN;
-	
-	// ********************** USART 2 ***************************
-	// PA2 = USART2_TX (AF7)
-	// PA3 = USART2_RX (AF7)
-	// Alternate function, High Speed, Push pull, Pull up
-	// **********************************************************
-	// Input(00), Output(01), AlterFunc(10), Analog(11)
-	GPIOA->MODER   &= ~(3<<(2*TX_PIN) | 3<<(2*RX_PIN));	// Clear bits
-	GPIOA->MODER   |=   2<<(2*TX_PIN) | 2<<(2*RX_PIN); 
-	GPIOA->AFR[0]  &= ~(0xF<<(4*TX_PIN) | 0xF<<(4*RX_PIN));	
-	GPIOA->AFR[0]  |=   7<<(4*TX_PIN) | 7<<(4*RX_PIN);       	
-	// GPIO Speed: Low speed (00), Medium speed (01), Fast speed (10), High speed (11)
-	GPIOA->OSPEEDR |=   3<<(2*TX_PIN) | 3<<(2*RX_PIN); 					 	
-	// GPIO Push-Pull: No pull-up, pull-down (00), Pull-up (01), Pull-down (10), Reserved (11)
-	GPIOA->PUPDR   &= ~(3<<(2*TX_PIN) | 3<<(2*RX_PIN));
-	// GPIO Output Type: Output push-pull (0, reset), Output open drain (1) 
-	GPIOA->OTYPER  &=  ~(1<<TX_PIN | 1<<RX_PIN);       	
-}
-
-
-void USART_Init (USART_TypeDef * USARTx) {
-	// Default setting: 
-	//     No hardware flow control, 8 data bits, no parity, 1 start bit and 1 stop bit		
-	USARTx->CR1 &= ~USART_CR1_UE;  // Disable USART
-	
-	// Configure word length to 8 bit
-	USARTx->CR1 &= ~USART_CR1_M;   // M: 00 = 8 data bits, 01 = 9 data bits, 10 = 7 data bits
-	
-	// Configure oversampling mode: Oversampling by 16 
-	USARTx->CR1 &= ~USART_CR1_OVER8;  // 0 = oversampling by 16, 1 = oversampling by 8
-	
-	// Configure stop bits to 1 stop bit
-	//   00: 1 Stop bit;      01: 0.5 Stop bit
-	//   10: 2 Stop bits;     11: 1.5 Stop bit
-	USARTx->CR2 &= ~USART_CR2_STOP;   
-                                    
-	// CSet Baudrate to 9600 using APB frequency (80,000,000 Hz)
-	// If oversampling by 16, Tx/Rx baud = f_CK / USARTDIV,  
-	// If oversampling by 8,  Tx/Rx baud = 2*f_CK / USARTDIV
-  // When OVER8 = 0, BRR = USARTDIV
-	// USARTDIV = 80MHz/9600 = 8333 = 0x208D
-	USARTx->BRR  = 0x208D; // Limited to 16 bits
-
-	USARTx->CR1  |= (USART_CR1_RE | USART_CR1_TE);  	// Transmitter and Receiver enable
-	
-  if (USARTx == UART4){	
-		USARTx->CR1 |= USART_CR1_RXNEIE;  			// Received Data Ready to be Read Interrupt  
-		USARTx->CR1 &= ~USART_CR1_TCIE;    			// Transmission Complete Interrupt 
-		USARTx->CR1 &= ~USART_CR1_IDLEIE;  			// Idle Line Detected Interrupt 
-		USARTx->CR1 &= ~USART_CR1_TXEIE;   			// Transmit Data Register Empty Interrupt 
-		USARTx->CR1 &= ~USART_CR1_PEIE;    			// Parity Error Interrupt 
-		USARTx->CR1 &= ~USART_CR2_LBDIE;				// LIN Break Detection Interrupt Enable
-		USARTx->CR1 &= ~USART_CR3_EIE;					// Error Interrupt Enable (Frame error, noise error, overrun error) 
-		//USARTx->CR3 &= ~USART_CR3_CTSIE;				// CTS Interrupt
-	}
-
-	if (USARTx == USART2){
-		USARTx->ICR |= USART_ICR_TCCF;
-		USART1->CR3 |= USART_CR3_DMAT | USART_CR3_DMAR;
-	}
-	
-	USARTx->CR1  |= USART_CR1_UE; // USART enable                 
-	
-	while ( (USARTx->ISR & USART_ISR_TEACK) == 0); // Verify that the USART is ready for reception
-	while ( (USARTx->ISR & USART_ISR_REACK) == 0); // Verify that the USART is ready for transmission
-}
-
-
-uint8_t USART_Read (USART_TypeDef * USARTx) {
-	// SR_RXNE (Read data register not empty) bit is set by hardware
-	while (!(USARTx->ISR & USART_ISR_RXNE));  // Wait until RXNE (RX not empty) bit is set
-	// USART resets the RXNE flag automatically after reading DR
-	return ((uint8_t)(USARTx->RDR & 0xFF));
-	// Reading USART_DR automatically clears the RXNE flag 
-}
-
-void USART_Write(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t nBytes) {
-	int i;
-	// TXE is cleared by a write to the USART_DR register.
-	// TXE is set by hardware when the content of the TDR 
-	// register has been transferred into the shift register.
-	for (i = 0; i < nBytes; i++) {
-		while (!(USARTx->ISR & USART_ISR_TXE));   	// wait until TXE (TX empty) bit is set
-		// Writing USART_DR automatically clears the TXE flag 	
-		USARTx->TDR = buffer[i] & 0xFF;
-		USART_Delay(300);
-	}
-	while (!(USARTx->ISR & USART_ISR_TC));   		  // wait until TC bit is set
-	USARTx->ISR &= ~USART_ISR_TC;
-}   
- 
-
-void USART_Delay(uint32_t us) {
-	uint32_t time = 100*us/7;    
-	while(--time);   
-}
-
-void USART_IRQHandler(USART_TypeDef * USARTx, uint8_t *buffer, uint32_t * pRx_counter){
-	if(USARTx->ISR & USART_ISR_RXNE) {						// Received data                         
-		buffer[*pRx_counter] = USARTx->RDR;         // Reading USART_DR automatically clears the RXNE flag 
-		(*pRx_counter)++;  
-		if((*pRx_counter) >= BUFFER_SIZE )  {
-			(*pRx_counter) = 0;
-		}   
-	} else if(USARTx->ISR & USART_ISR_TXE) {
- 		//USARTx->ISR &= ~USART_ISR_TXE;            // clear interrupt 
-		//Tx1_Counter++;
-	} else if(USARTx->ISR & USART_ISR_ORE) {			// Overrun Error
-		while(1);
-	} else if(USARTx->ISR & USART_ISR_PE) {				// Parity Error
-		while(1);
-	} else if(USARTx->ISR & USART_ISR_PE) {				// USART_ISR_FE	
-		while(1);
-	} else if (USARTx->ISR & USART_ISR_NE){ 			// Noise Error Flag
-		while(1);     
-	}	
-}
-
diff --git a/project/Core/Src/adc.c b/project/Core/Src/adc.c
deleted file mode 100644
index 549f4bb..0000000
--- a/project/Core/Src/adc.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * adc.c
- *
- *  Created on: Apr 13, 2022
- *      Author: bruce
- */
-
-#include "adc.h"
-#include "stm32l4xx.h"
-#include "main.h"
-
-ADC_HandleTypeDef hadc1;
-
-/**
-* @brief ADC MSP Initialization
-* This function configures the hardware resources used in this example
-* @param hadc: ADC handle pointer
-* @retval None
-*/
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
-  if(hadc->Instance==ADC1)
-  {
-  /** Initializes the peripherals clock
-  */
-    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
-    PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
-    PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
-    PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
-    PeriphClkInit.PLLSAI1.PLLSAI1N = 8;
-    PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
-    PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
-    PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
-    PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK;
-    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-	{
-    	Error_Handler();
-	}
-
-
-    /* Peripheral clock enable */
-    __HAL_RCC_ADC_CLK_ENABLE();
-
-    __HAL_RCC_GPIOA_CLK_ENABLE();
-    /**ADC1 GPIO Configuration
-    PA0     ------> ADC1_IN5
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_0;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-  }
-
-}
-
-/**
-* @brief ADC MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param hadc: ADC handle pointer
-* @retval None
-*/
-void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
-{
-  if(hadc->Instance==ADC1)
-  {
-    __HAL_RCC_ADC_CLK_DISABLE();
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
-  }
-
-}
-
-void ADC_Init () {
-	  ADC_MultiModeTypeDef multimode = {0};
-	  ADC_ChannelConfTypeDef sConfig = {0};
-
-	  /** Common config
-	  */
-	  hadc1.Instance = ADC1;
-	  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
-	  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
-	  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-	  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
-	  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-	  hadc1.Init.LowPowerAutoWait = DISABLE;
-	  hadc1.Init.ContinuousConvMode = DISABLE;
-	  hadc1.Init.NbrOfConversion = 1;
-	  hadc1.Init.DiscontinuousConvMode = DISABLE;
-	  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-	  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-	  hadc1.Init.DMAContinuousRequests = DISABLE;
-	  hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
-	  hadc1.Init.OversamplingMode = DISABLE;
-	  if (HAL_ADC_Init(&hadc1) != HAL_OK)
-	  {
-		  Error_Handler();
-	  }
-
-	  /** Configure the ADC multi-mode
-	  */
-	  multimode.Mode = ADC_MODE_INDEPENDENT;
-	  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
-	  {
-		  Error_Handler();
-	  }
-
-
-	  /** Configure Regular Channel
-	  */
-	  sConfig.Channel = ADC_CHANNEL;
-	  sConfig.Rank = ADC_REGULAR_RANK_1;
-	  sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
-	  sConfig.SingleDiff = ADC_SINGLE_ENDED;
-	  sConfig.OffsetNumber = ADC_OFFSET_NONE;
-	  sConfig.Offset = 0;
-	  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig)  != HAL_OK)
-	  {
-		  Error_Handler();
-	  }
-}
-
-void ADC_Start () {
-	HAL_ADC_Start (&hadc1);
-}
-
-uint32_t ADC_Read_Value_Blocking () {
-	HAL_ADC_PollForConversion (&hadc1, 10);
-	return HAL_ADC_GetValue (&hadc1);
-}
diff --git a/project/Core/Src/dac.c b/project/Core/Src/dac.c
deleted file mode 100644
index e03f9ce..0000000
--- a/project/Core/Src/dac.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * dac.c
- *
- *  Created on: Apr 13, 2022
- *      Author: bruce
- */
-
-#include "dac.h"
-#include "main.h"
-#include "stm32l4xx.h"
-
-DAC_HandleTypeDef hdac1;
-
-/**
-* @brief DAC MSP Initialization
-* This function configures the hardware resources used in this example
-* @param hdac: DAC handle pointer
-* @retval None
-*/
-void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
-{
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(hdac->Instance==DAC1)
-  {
-    __HAL_RCC_DAC1_CLK_ENABLE();
-
-    __HAL_RCC_GPIOA_CLK_ENABLE();
-    GPIO_InitStruct.Pin = GPIO_PIN_4;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-  }
-
-}
-
-/**
-* @brief DAC MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param hdac: DAC handle pointer
-* @retval None
-*/
-void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
-{
-  if(hdac->Instance==DAC1)
-  {
-    __HAL_RCC_DAC1_CLK_DISABLE();
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
-  }
-
-}
-
-void DAC_Init () {
-	DAC_ChannelConfTypeDef sConfig = {0};
-
-  /** DAC Initialization
-  */
-  hdac1.Instance = DAC1;
-  if (HAL_DAC_Init(&hdac1) != HAL_OK)
-  {
-    Error_Handler();
-  }
-
-  /** DAC channel OUT1 config
-  */
-  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
-  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
-  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
-  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE;
-  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
-
-  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
-  {
-    Error_Handler();
-  }
-}
-
-void DAC_Start () {
-	HAL_DAC_Start (&hdac1, DAC_CHANNEL_1);
-}
-
-void DAC_Set_Value (uint32_t value) {
-	HAL_DAC_SetValue (&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, value);
-}
diff --git a/project/Core/Src/error_handler.c b/project/Core/Src/error_handler.c
deleted file mode 100644
index 627abed..0000000
--- a/project/Core/Src/error_handler.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include "error_handler.h"
-
-/**
- * Error handler that is called by lower level functions. 
- * Add an implementation if desired.
-*/
-void Error_Handler () {
-	
-}
\ No newline at end of file
diff --git a/project/Core/Src/project.c b/project/Core/Src/project.c
deleted file mode 100644
index d029e0b..0000000
--- a/project/Core/Src/project.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/*
- * project.c
- *
- *  Created on: Jan 8, 2023
- *      Author: bruce
- */
-
-#include "project.h"
diff --git a/project/Core/Src/song.c b/project/Core/Src/song.c
deleted file mode 100644
index e6b4cf7..0000000
--- a/project/Core/Src/song.c
+++ /dev/null
@@ -1,1774 +0,0 @@
-/*
- * song.c
- *
- *  Created on: Nov 15, 2022
- *      Author: bruce
- */
-
-#include "song.h"
-
-// 1 track - 1 note at a time (required - part 3)
-unsigned char song0[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x01,0x00,0x4d,0x54,0x72,0x6b,
-                        0x00,0x00,0x00,0x57,0x00,0xff,0x58,0x04,0x04,0x02,0x18,0x08,0x00,0xff,0x59,0x02,0x00,0x00,
-                        0x00,0xff,0x51,0x03,0x09,0xa3,0x19,0x00,0xff,0x03,0x1b,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,
-                        0x20,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,0x20,0x4c,0x69,0x74,0x74,0x6c,0x65,0x20,0x53,0x74,
-                        0x61,0x72,0x00,0xff,0x01,0x0b,0x54,0x72,0x61,0x64,0x69,0x74,0x69,0x6f,0x6e,0x61,0x6c,0x00,
-                        0xff,0x02,0x0c,0x4a,0x69,0x6d,0x20,0x50,0x61,0x74,0x65,0x72,0x73,0x6f,0x6e,0x01,0xff,0x2f,
-                        0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x01,0x9a,0x00,0xc0,0x00,0x00,0xb0,0x79,0x00,0x00,0xb0,
-                        0x40,0x00,0x00,0xb0,0x0a,0x3f,0x00,0xb0,0x07,0x5f,0x00,0x90,0x3c,0x4d,0x00,0xff,0x03,0x05,
-                        0x50,0x69,0x61,0x6e,0x6f,0x81,0x74,0x80,0x3c,0x00,0x0c,0x90,0x3c,0x53,0x81,0x74,0x80,0x3c,
-                        0x00,0x0c,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x57,0x81,0x74,0x80,0x43,
-                        0x00,0x0c,0x90,0x45,0x56,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,0x45,0x53,0x81,0x74,0x80,0x45,
-                        0x00,0x0c,0x90,0x43,0x51,0x83,0x67,0x80,0x43,0x00,0x19,0x90,0x41,0x50,0x81,0x74,0x80,0x41,
-                        0x00,0x0c,0x90,0x41,0x55,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,
-                        0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x51,0x81,0x74,0x80,0x3e,
-                        0x00,0x0c,0x90,0x3e,0x53,0x81,0x74,0x80,0x3e,0x00,0x0c,0x90,0x3c,0x51,0x83,0x67,0x80,0x3c,
-                        0x00,0x19,0x90,0x43,0x5e,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x53,0x81,0x74,0x80,0x43,
-                        0x00,0x0c,0x90,0x41,0x51,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x41,0x54,0x81,0x74,0x80,0x41,
-                        0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,
-                        0x00,0x0c,0x90,0x3e,0x52,0x83,0x67,0x80,0x3e,0x00,0x19,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,
-                        0x00,0x0c,0x90,0x43,0x54,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x41,0x54,0x81,0x74,0x80,0x41,
-                        0x00,0x0c,0x90,0x41,0x55,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,
-                        0x00,0x0c,0x90,0x40,0x52,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x53,0x83,0x67,0x80,0x3e,
-                        0x00,0x19,0x90,0x3c,0x52,0x81,0x74,0x80,0x3c,0x00,0x0c,0x90,0x3c,0x53,0x81,0x74,0x80,0x3c,
-                        0x00,0x0c,0x90,0x43,0x5a,0x81,0x74,0x80,0x43,0x00,0x0c,0x90,0x43,0x53,0x81,0x74,0x80,0x43,
-                        0x00,0x0c,0x90,0x45,0x57,0x81,0x74,0x80,0x45,0x00,0x0c,0x90,0x45,0x51,0x81,0x74,0x80,0x45,
-                        0x00,0x0c,0x90,0x43,0x4f,0x83,0x67,0x80,0x43,0x00,0x19,0x90,0x41,0x51,0x81,0x74,0x80,0x41,
-                        0x00,0x0c,0x90,0x41,0x53,0x81,0x74,0x80,0x41,0x00,0x0c,0x90,0x40,0x51,0x81,0x74,0x80,0x40,
-                        0x00,0x0c,0x90,0x40,0x54,0x81,0x74,0x80,0x40,0x00,0x0c,0x90,0x3e,0x52,0x81,0x74,0x80,0x3e,
-                        0x00,0x0c,0x90,0x3e,0x53,0x81,0x74,0x80,0x3e,0x00,0x0c,0x90,0x3c,0x50,0x83,0x67,0x80,0x3c,
-                        0x00,0x01,0xff,0x2f,0x00};
-
-//// 1 track - 1 note at a time (required - part 3)
-unsigned char song1[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x00,0xf0,0x4d,0x54,0x72,0x6b,
-                        0x00,0x00,0x00,0x37,0x00,0xff,0x51,0x03,0x0a,0x2c,0x2a,0x00,0xff,0x58,0x04,0x04,0x02,0x18,
-                        0x08,0x00,0xff,0x59,0x02,0x01,0x00,0x00,0xff,0x58,0x04,0x06,0x03,0x0c,0x08,0x00,0xff,0x03,
-                        0x12,0x48,0x61,0x72,0x72,0x79,0x20,0x50,0x6f,0x74,0x74,0x65,0x72,0x20,0x54,0x68,0x65,0x6d,
-                        0x65,0x00,0xff,0x2f,0x00,0x4d,0x54,0x72,0x6b,0x00,0x00,0x02,0x16,0x00,0xff,0x03,0x0a,0x75,
-                        0x6e,0x62,0x65,0x6e,0x61,0x6e,0x6e,0x74,0x31,0x00,0xc0,0x0b,0x00,0xb0,0x07,0x70,0x84,0x58,
-                        0x90,0x47,0x64,0x78,0x80,0x47,0x64,0x00,0x90,0x4c,0x64,0x81,0x34,0x80,0x4c,0x64,0x00,0x90,
-                        0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,0x90,0x4e,0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,
-                        0x81,0x70,0x80,0x4c,0x64,0x00,0x90,0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x51,0x64,0x82,
-                        0x68,0x80,0x51,0x64,0x00,0x90,0x4e,0x64,0x82,0x68,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,0x81,
-                        0x34,0x80,0x4c,0x64,0x00,0x90,0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,0x90,0x4e,0x64,0x78,0x80,
-                        0x4e,0x64,0x00,0x90,0x4a,0x64,0x81,0x70,0x80,0x4a,0x64,0x00,0x90,0x4d,0x64,0x78,0x80,0x4d,
-                        0x64,0x00,0x90,0x47,0x64,0x84,0x58,0x80,0x47,0x64,0x00,0x90,0x47,0x64,0x78,0x80,0x47,0x64,
-                        0x00,0x90,0x4c,0x64,0x81,0x34,0x80,0x4c,0x64,0x00,0x90,0x4f,0x64,0x3c,0x80,0x4f,0x64,0x00,
-                        0x90,0x4e,0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4c,0x64,0x81,0x70,0x80,0x4c,0x64,0x00,0x90,
-                        0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x56,0x64,0x81,0x70,0x80,0x56,0x64,0x00,0x90,0x55,
-                        0x64,0x78,0x80,0x55,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,0x50,0x64,
-                        0x78,0x80,0x50,0x64,0x00,0x90,0x54,0x64,0x81,0x34,0x80,0x54,0x64,0x00,0x90,0x53,0x64,0x3c,
-                        0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x4e,0x64,0x81,0x70,0x80,
-                        0x4e,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x4c,0x64,0x84,0x58,0x80,0x4c,
-                        0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,
-                        0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,0x00,
-                        0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,
-                        0x53,0x64,0x78,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x81,0x70,0x80,0x52,0x64,0x00,0x90,0x4e,
-                        0x64,0x78,0x80,0x4e,0x64,0x00,0x90,0x4f,0x64,0x81,0x34,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,
-                        0x3c,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x46,0x64,0x81,0x70,
-                        0x80,0x46,0x64,0x00,0x90,0x47,0x64,0x78,0x80,0x47,0x64,0x00,0x90,0x53,0x64,0x84,0x58,0x80,
-                        0x53,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,
-                        0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x53,0x64,0x81,0x70,0x80,0x53,0x64,
-                        0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x56,0x64,0x81,0x70,0x80,0x56,0x64,0x00,
-                        0x90,0x55,0x64,0x78,0x80,0x55,0x64,0x00,0x90,0x54,0x64,0x81,0x70,0x80,0x54,0x64,0x00,0x90,
-                        0x50,0x64,0x78,0x80,0x50,0x64,0x00,0x90,0x54,0x64,0x81,0x34,0x80,0x54,0x64,0x00,0x90,0x53,
-                        0x64,0x3c,0x80,0x53,0x64,0x00,0x90,0x52,0x64,0x78,0x80,0x52,0x64,0x00,0x90,0x4e,0x64,0x81,
-                        0x70,0x80,0x4e,0x64,0x00,0x90,0x4f,0x64,0x78,0x80,0x4f,0x64,0x00,0x90,0x4c,0x64,0x84,0x58,
-                        0x80,0x4c,0x64,0x00,0xff,0x2f,0x00};
-
-//// 1 track - 3 notes at a time (10% extra credit - part 3)
-unsigned char song2[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x02,0x01,0x00,0x4d,0x54,0x72,0x6b,
-                        0x00,0x00,0x00,0x57,0x00,0xff,0x58,0x04,0x04,0x02,0x18,0x08,0x00,0xff,0x59,0x02,0x00,0x00,
-                        0x00,0xff,0x51,0x03,0x09,0xa3,0x19,0x00,0xff,0x03,0x1b,0x54,0x77,0x69,0x6e,0x6b,0x6c,0x65,
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-
-//// 4 tracks - One note per track (10% extra credit - part 3)
-
-unsigned char song3[] ={0x4d,0x54,0x68,0x64,0x00,0x00,0x00,0x06,0x00,0x01,0x00,0x05,0x01,0x80,0x4d,0x54,0x72,0x6b,
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-
-//// 3 tracks (no meta track) - lots of notes per track (5% extra credit - part 3)
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-                        0x82,0x38,0x00,0x00,0x92,0x3c,0x32,0x81,0x40,0x82,0x3c,0x00,0x00,0x92,0x3e,0x32,0x81,0x40,
-                        0x82,0x3e,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,0x38,0x32,0x83,0x00,
-                        0x82,0x38,0x00,0x00,0x92,0x3c,0x32,0x81,0x40,0x82,0x3c,0x00,0x00,0x92,0x3e,0x32,0x81,0x40,
-                        0x82,0x3e,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,0x38,0x32,0x81,0x40,
-                        0x82,0x38,0x00,0x81,0x40,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x81,0x40,0x92,0x41,0x32,
-                        0x83,0x00,0x82,0x41,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x81,0x40,0x92,0x41,
-                        0x32,0x81,0x40,0x82,0x41,0x00,0x81,0x40,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,
-                        0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x00,0x92,
-                        0x41,0x32,0x81,0x40,0x82,0x41,0x00,0x00,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,
-                        0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x00,0x92,
-                        0x41,0x32,0x81,0x40,0x82,0x41,0x00,0x00,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,
-                        0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x00,0x92,
-                        0x41,0x32,0x81,0x40,0x82,0x41,0x00,0x00,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,
-                        0x44,0x32,0x83,0x00,0x82,0x44,0x00,0x00,0x92,0x46,0x32,0x83,0x00,0x82,0x46,0x00,0x00,0x92,
-                        0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,
-                        0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,
-                        0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,
-                        0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x48,0x32,0x81,0x40,0x82,0x48,0x00,0x00,0x92,
-                        0x46,0x32,0x83,0x00,0x82,0x46,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,
-                        0x43,0x32,0x81,0x40,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,
-                        0x46,0x32,0x83,0x00,0x82,0x46,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x81,0x40,
-                        0x92,0x43,0x32,0x81,0x40,0x82,0x43,0x00,0x81,0x40,0x92,0x44,0x32,0x83,0x00,0x82,0x44,0x00,
-                        0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x41,0x32,0x81,0x40,0x82,0x41,0x00,
-                        0x00,0x92,0x43,0x32,0x81,0x40,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x83,0x00,0x82,0x44,0x00,
-                        0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x43,0x32,0x81,0x40,0x82,0x43,0x00,
-                        0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,
-                        0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,
-                        0x00,0x92,0x41,0x32,0x81,0x40,0x82,0x41,0x00,0x00,0x92,0x43,0x32,0x83,0x00,0x82,0x43,0x00,
-                        0x00,0x92,0x3c,0x32,0x81,0x40,0x82,0x3c,0x00,0x81,0x40,0x92,0x3e,0x32,0x81,0x40,0x82,0x3e,
-                        0x00,0x81,0x40,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,0x38,0x32,0x83,0x00,0x82,
-                        0x38,0x00,0x00,0x92,0x3c,0x32,0x81,0x40,0x82,0x3c,0x00,0x00,0x92,0x3e,0x32,0x81,0x40,0x82,
-                        0x3e,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,0x38,0x32,0x83,0x00,0x82,
-                        0x38,0x00,0x00,0x92,0x3c,0x32,0x81,0x40,0x82,0x3c,0x00,0x00,0x92,0x3e,0x32,0x81,0x40,0x82,
-                        0x3e,0x00,0x00,0x92,0x3f,0x32,0x83,0x00,0x82,0x3f,0x00,0x00,0x92,0x38,0x32,0x81,0x40,0x82,
-                        0x38,0x00,0x81,0x40,0x92,0x3f,0x32,0x81,0x40,0x82,0x3f,0x00,0x81,0x40,0x92,0x3e,0x32,0x83,
-                        0x00,0x82,0x3e,0x00,0x00,0x92,0x37,0x32,0x81,0x40,0x82,0x37,0x00,0x81,0x40,0x92,0x3e,0x32,
-                        0x81,0x40,0x82,0x3e,0x00,0x81,0x40,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x37,
-                        0x32,0x83,0x00,0x82,0x37,0x00,0x00,0x92,0x38,0x32,0x81,0x40,0x82,0x38,0x00,0x00,0x92,0x3a,
-                        0x32,0x81,0x40,0x82,0x3a,0x00,0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x37,
-                        0x32,0x83,0x00,0x82,0x37,0x00,0x00,0x92,0x38,0x32,0x81,0x40,0x82,0x38,0x00,0x00,0x92,0x3a,
-                        0x32,0x81,0x40,0x82,0x3a,0x00,0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x37,
-                        0x32,0x83,0x00,0x82,0x37,0x00,0x00,0x92,0x38,0x32,0x81,0x40,0x82,0x38,0x00,0x00,0x92,0x3a,
-                        0x32,0x81,0x40,0x82,0x3a,0x00,0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x37,
-                        0x32,0x83,0x00,0x82,0x37,0x00,0x00,0x92,0x38,0x32,0x81,0x40,0x82,0x38,0x00,0x00,0x92,0x3a,
-                        0x32,0x81,0x40,0x82,0x3a,0x00,0x00,0x92,0x3c,0x32,0x83,0x00,0x82,0x3c,0x00,0x00,0x92,0x43,
-                        0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,
-                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x43,
-                        0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,
-                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x83,0x00,0x82,0x48,0x00,0x00,0x92,0x43,
-                        0x32,0x83,0x00,0x82,0x43,0x00,0x00,0x92,0x44,0x32,0x81,0x40,0x82,0x44,0x00,0x00,0x92,0x46,
-                        0x32,0x81,0x40,0x82,0x46,0x00,0x00,0x92,0x48,0x32,0x88,0x20,0x82,0x48,0x00,0x00,0xff,0x2f,
-                        0x00};
-
-// Convenience list of all the songs in one array.
-song songs[] = {{song0, sizeof (song0)}, {song1, sizeof (song1)}, {song2, sizeof (song2)}, {song3, sizeof (song3)},
-				{song4, sizeof (song4)}};
-
-song get_song (uint8_t song_number){
-	return songs[song_number];
-}
diff --git a/project/Core/Src/syscalls.c b/project/Core/Src/syscalls.c
deleted file mode 100644
index 4ec9584..0000000
--- a/project/Core/Src/syscalls.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/**
- ******************************************************************************
- * @file      syscalls.c
- * @author    Auto-generated by STM32CubeIDE
- * @brief     STM32CubeIDE Minimal System calls file
- *
- *            For more information about which c-functions
- *            need which of these lowlevel functions
- *            please consult the Newlib libc-manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <sys/stat.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <stdio.h>
-#include <signal.h>
-#include <time.h>
-#include <sys/time.h>
-#include <sys/times.h>
-
-
-/* Variables */
-//#undef errno
-extern int errno;
-extern int __io_putchar(int ch) __attribute__((weak));
-extern int __io_getchar(void) __attribute__((weak));
-
-register char * stack_ptr asm("sp");
-
-char *__env[1] = { 0 };
-char **environ = __env;
-
-
-/* Functions */
-void initialise_monitor_handles()
-{
-}
-
-int _getpid(void)
-{
-	return 1;
-}
-
-int _kill(int pid, int sig)
-{
-	errno = EINVAL;
-	return -1;
-}
-
-void _exit (int status)
-{
-	_kill(status, -1);
-	while (1) {}		/* Make sure we hang here */
-}
-
-__attribute__((weak)) int _read(int file, char *ptr, int len)
-{
-	int DataIdx;
-
-	for (DataIdx = 0; DataIdx < len; DataIdx++)
-	{
-		*ptr++ = __io_getchar();
-	}
-
-return len;
-}
-
-__attribute__((weak)) int _write(int file, char *ptr, int len)
-{
-	int DataIdx;
-
-	for (DataIdx = 0; DataIdx < len; DataIdx++)
-	{
-		__io_putchar(*ptr++);
-	}
-	return len;
-}
-
-int _close(int file)
-{
-	return -1;
-}
-
-
-int _fstat(int file, struct stat *st)
-{
-	st->st_mode = S_IFCHR;
-	return 0;
-}
-
-int _isatty(int file)
-{
-	return 1;
-}
-
-int _lseek(int file, int ptr, int dir)
-{
-	return 0;
-}
-
-int _open(char *path, int flags, ...)
-{
-	/* Pretend like we always fail */
-	return -1;
-}
-
-int _wait(int *status)
-{
-	errno = ECHILD;
-	return -1;
-}
-
-int _unlink(char *name)
-{
-	errno = ENOENT;
-	return -1;
-}
-
-int _times(struct tms *buf)
-{
-	return -1;
-}
-
-int _stat(char *file, struct stat *st)
-{
-	st->st_mode = S_IFCHR;
-	return 0;
-}
-
-int _link(char *old, char *new)
-{
-	errno = EMLINK;
-	return -1;
-}
-
-int _fork(void)
-{
-	errno = EAGAIN;
-	return -1;
-}
-
-int _execve(char *name, char **argv, char **env)
-{
-	errno = ENOMEM;
-	return -1;
-}
diff --git a/project/Core/Src/sysmem.c b/project/Core/Src/sysmem.c
deleted file mode 100644
index d7cc52c..0000000
--- a/project/Core/Src/sysmem.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/**
- ******************************************************************************
- * @file      sysmem.c
- * @author    Generated by STM32CubeIDE
- * @brief     STM32CubeIDE System Memory calls file
- *
- *            For more information about which C functions
- *            need which of these lowlevel functions
- *            please consult the newlib libc manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <errno.h>
-#include <stdint.h>
-
-/**
- * Pointer to the current high watermark of the heap usage
- */
-static uint8_t *__sbrk_heap_end = NULL;
-
-/**
- * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
- *        and others from the C library
- *
- * @verbatim
- * ############################################################################
- * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
- * #         #        #                         # Reserved by _Min_Stack_Size #
- * ############################################################################
- * ^-- RAM start      ^-- _end                             _estack, RAM end --^
- * @endverbatim
- *
- * This implementation starts allocating at the '_end' linker symbol
- * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
- * The implementation considers '_estack' linker symbol to be RAM end
- * NOTE: If the MSP stack, at any point during execution, grows larger than the
- * reserved size, please increase the '_Min_Stack_Size'.
- *
- * @param incr Memory size
- * @return Pointer to allocated memory
- */
-void *_sbrk(ptrdiff_t incr)
-{
-  extern uint8_t _end; /* Symbol defined in the linker script */
-  extern uint8_t _estack; /* Symbol defined in the linker script */
-  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
-  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
-  const uint8_t *max_heap = (uint8_t *)stack_limit;
-  uint8_t *prev_heap_end;
-
-  /* Initialize heap end at first call */
-  if (NULL == __sbrk_heap_end)
-  {
-    __sbrk_heap_end = &_end;
-  }
-
-  /* Protect heap from growing into the reserved MSP stack */
-  if (__sbrk_heap_end + incr > max_heap)
-  {
-    errno = ENOMEM;
-    return (void *)-1;
-  }
-
-  prev_heap_end = __sbrk_heap_end;
-  __sbrk_heap_end += incr;
-
-  return (void *)prev_heap_end;
-}
diff --git a/project/Core/Src/system_stm32l4xx.c b/project/Core/Src/system_stm32l4xx.c
deleted file mode 100644
index ab94a2c..0000000
--- a/project/Core/Src/system_stm32l4xx.c
+++ /dev/null
@@ -1,337 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l4xx.c
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
-  *
-  *   This file provides two functions and one global variable to be called from
-  *   user application:
-  *      - SystemInit(): This function is called at startup just after reset and
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32l4xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick
-  *                                  timer or configure other parameters.
-  *
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  *   After each device reset the MSI (4 MHz) is used as system clock source.
-  *   Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
-  *   configure the system clock before to branch to main program.
-  *
-  *   This file configures the system clock as follows:
-  *=============================================================================
-  *-----------------------------------------------------------------------------
-  *        System Clock source                    | MSI
-  *-----------------------------------------------------------------------------
-  *        SYSCLK(Hz)                             | 4000000
-  *-----------------------------------------------------------------------------
-  *        HCLK(Hz)                               | 4000000
-  *-----------------------------------------------------------------------------
-  *        AHB Prescaler                          | 1
-  *-----------------------------------------------------------------------------
-  *        APB1 Prescaler                         | 1
-  *-----------------------------------------------------------------------------
-  *        APB2 Prescaler                         | 1
-  *-----------------------------------------------------------------------------
-  *        PLL_M                                  | 1
-  *-----------------------------------------------------------------------------
-  *        PLL_N                                  | 8
-  *-----------------------------------------------------------------------------
-  *        PLL_P                                  | 7
-  *-----------------------------------------------------------------------------
-  *        PLL_Q                                  | 2
-  *-----------------------------------------------------------------------------
-  *        PLL_R                                  | 2
-  *-----------------------------------------------------------------------------
-  *        PLLSAI1_P                              | NA
-  *-----------------------------------------------------------------------------
-  *        PLLSAI1_Q                              | NA
-  *-----------------------------------------------------------------------------
-  *        PLLSAI1_R                              | NA
-  *-----------------------------------------------------------------------------
-  *        PLLSAI2_P                              | NA
-  *-----------------------------------------------------------------------------
-  *        PLLSAI2_Q                              | NA
-  *-----------------------------------------------------------------------------
-  *        PLLSAI2_R                              | NA
-  *-----------------------------------------------------------------------------
-  *        Require 48MHz for USB OTG FS,          | Disabled
-  *        SDIO and RNG clock                     |
-  *-----------------------------------------------------------------------------
-  *=============================================================================
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under Apache License, Version 2.0,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/Apache-2.0
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l4xx_system
-  * @{
-  */
-
-/** @addtogroup STM32L4xx_System_Private_Includes
-  * @{
-  */
-
-#include "stm32l4xx.h"
-
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    8000000U  /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    4000000U  /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_Defines
-  * @{
-  */
-
-/************************* Miscellaneous Configuration ************************/
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field.
-                                   This value must be a multiple of 0x200. */
-/******************************************************************************/
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_Variables
-  * @{
-  */
-  /* The SystemCoreClock variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-  uint32_t SystemCoreClock = 4000000U;
-
-  const uint8_t  AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
-  const uint8_t  APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
-  const uint32_t MSIRangeTable[12] = {100000U,   200000U,   400000U,   800000U,  1000000U,  2000000U, \
-                                      4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L4xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system.
-  * @param  None
-  * @retval None
-  */
-
-void SystemInit(void)
-{
-  /* FPU settings ------------------------------------------------------------*/
-  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
-  #endif
-
-  /* Reset the RCC clock configuration to the default reset state ------------*/
-  /* Set MSION bit */
-  RCC->CR |= RCC_CR_MSION;
-
-  /* Reset CFGR register */
-  RCC->CFGR = 0x00000000U;
-
-  /* Reset HSEON, CSSON , HSION, and PLLON bits */
-  RCC->CR &= 0xEAF6FFFFU;
-
-  /* Reset PLLCFGR register */
-  RCC->PLLCFGR = 0x00001000U;
-
-  /* Reset HSEBYP bit */
-  RCC->CR &= 0xFFFBFFFFU;
-
-  /* Disable all interrupts */
-  RCC->CIER = 0x00000000U;
-
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
-  * @brief  Update SystemCoreClock variable according to Clock Register Values.
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.
-  *
-  * @note   - The system frequency computed by this function is not the real
-  *           frequency in the chip. It is calculated based on the predefined
-  *           constant and the selected clock source:
-  *
-  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
-  *
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
-  *
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
-  *
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
-  *             or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
-  *
-  *         (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
-  *             4 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.
-  *
-  *         (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
-  *              16 MHz) but the real value may vary depending on the variations
-  *              in voltage and temperature.
-  *
-  *         (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
-  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *              frequency of the crystal used. Otherwise, this function may
-  *              have wrong result.
-  *
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  *
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate(void)
-{
-  uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
-
-  /* Get MSI Range frequency--------------------------------------------------*/
-  if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
-  { /* MSISRANGE from RCC_CSR applies */
-    msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
-  }
-  else
-  { /* MSIRANGE from RCC_CR applies */
-    msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
-  }
-  /*MSI frequency range in HZ*/
-  msirange = MSIRangeTable[msirange];
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (RCC->CFGR & RCC_CFGR_SWS)
-  {
-    case 0x00:  /* MSI used as system clock source */
-      SystemCoreClock = msirange;
-      break;
-
-    case 0x04:  /* HSI used as system clock source */
-      SystemCoreClock = HSI_VALUE;
-      break;
-
-    case 0x08:  /* HSE used as system clock source */
-      SystemCoreClock = HSE_VALUE;
-      break;
-
-    case 0x0C:  /* PLL used as system clock  source */
-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
-         SYSCLK = PLL_VCO / PLLR
-         */
-      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
-      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
-
-      switch (pllsource)
-      {
-        case 0x02:  /* HSI used as PLL clock source */
-          pllvco = (HSI_VALUE / pllm);
-          break;
-
-        case 0x03:  /* HSE used as PLL clock source */
-          pllvco = (HSE_VALUE / pllm);
-          break;
-
-        default:    /* MSI used as PLL clock source */
-          pllvco = (msirange / pllm);
-          break;
-      }
-      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
-      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
-      SystemCoreClock = pllvco/pllr;
-      break;
-
-    default:
-      SystemCoreClock = msirange;
-      break;
-  }
-  /* Compute HCLK clock frequency --------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;
-}
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/project/Core/Src/systick.c b/project/Core/Src/systick.c
deleted file mode 100644
index 263defd..0000000
--- a/project/Core/Src/systick.c
+++ /dev/null
@@ -1,23 +0,0 @@
-#include "systick.h"
-
-// This function is to Initialize SysTick registers
-void init_systick()
-{
-	// Use the SysTick global structure pointer to do the following in this
-	// exact order with separate lines for each step:
-	//
-	// Disable SysTick by clearing the CTRL (CSR) register.
-	// Set the LOAD (RVR) to 8 million to give us a 100 milliseconds timer.
-	// Set the clock source bit in the CTRL (CSR) to the internal clock.
-	// Set the enable bit in the CTRL (CSR) to start the timer.
-}
-
-// This fuction is to create delay using SysTick timer counter
-void delay_systick()
-{
-	// Using the SysTick global structure pointer do the following:
-	// Create a for loop that loops 10 times
-	// Inside that for loop check the COUNTFLAG bit in the CTRL (CSR)
-	// register in a loop. When that bit is set exit this inner loop
-	// to do another pass in the outer loop of 10.
-}
diff --git a/project/Core/Src/tone.c b/project/Core/Src/tone.c
deleted file mode 100644
index a0d1cb0..0000000
--- a/project/Core/Src/tone.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * tone.c
- *
- *  Created on: May 14, 2022
- *      Author: bruce
- */
-
-
-#include "tone.h"
-
-#define CPU_SPEED (80000000.0)
-#define MAX_TONES (1)
-
-static float notes[] = {
-/* Octave -1 */			   8.18,    8.66,    9.18,    9.73,   10.30,   10.92,   11.56,   12.25,   12.98,   13.75,   14.57,   13.44,
-/* Octave  0 */           16.35,   17.32,   18.35,   19.45,   20.60,   21.83,   23.12,   24.50,   25.96,   27.50,   29.14,   30.87,
-/* Octave  1 */  	      32.70,   34.65,   36.71,   38.89,   41.20,   43.65,   46.25,   49.00,   51.91,   55.00,   58.27,   61.74,
-/* Octave  2 */			  65.41,   69.30,   73.42,   77.78,   82.41,   87.31,   92.50,   98.00,  103.83,  110.00,  116.54,  123.47,
-/* Octave  3 */			 130.81,  138.59,  146.83,  155.56,  164.81,  174.61,  185.00,  196.00,  207.65,  220.00,  233.08,  246.94,
-/* Octave  4 */			 261.63,  277.18,  293.66,  311.13,  329.63,  349.23,  369.99,  392.00,  415.30,  440.00,  466.16,  493.88,
-/* Octave  5 */          523.25,  554.37,  587.33,  622.25,  659.25,  698.46,  739.99,  783.99,  830.61,  880.00,  932.33,  987.77,
-/* Octave  6 */         1046.50, 1108.73, 1174.66, 1244.51, 1318.51, 1396.91, 1479.98, 1567.98, 1661.22, 1760.00, 1864.66, 1975.53,
-/* Octave  7 */         2093.00, 2217.46, 2349.32, 2489.02, 2637.02, 2793.83, 2959.96, 3135.96, 3322.44, 3520.00, 3729.31, 3951.07,
-/* Octave  8 */         4186.01, 4434.92, 4698.63, 4978.03, 5274.04, 5587.65, 5919.91, 6271.93, 6644.88, 7040.00, 7458.62, 7902.13,
-/* Octave  9 */         8372.02, 8869.84, 9397.26, 9956.06,10548.08,11175.30,11839.82,12543.86};
-
-typedef struct {
-	uint32_t duration;
-	uint16_t power;
-} tone_info;
-
-static uint32_t counter = 0;
-
-static tone_info tones[MAX_TONES] = {{0,0}};
-
-/* You will want to integrate this with your existing one
-   but it is here for standalone testing                 
-*/
-//void SysTick_Handler() {
-//	counter++;
-//}
-
-uint32_t get_tick_speed ();
-
-
-// Convert from hertz to ticks
-uint32_t hertz_to_systicks (float hertz) {
-	float ticks_per_second = CPU_SPEED / (SysTick->LOAD + 1);
-	if (hertz == 0)
-		return 0;
-	float duration = 1 / hertz;
-	return (uint32_t) (duration * ticks_per_second);
-}
-
-// Accessor for the counter
-uint32_t get_counter () {
-	return counter;
-}
-
-void reset_counter () {
-	counter = 0;
-}
-
-// Add a tone to the tones array
-uint8_t add_tone (uint8_t note, uint8_t velocity) {
-	tones [0] = (tone_info){hertz_to_systicks (notes [note]), velocity};
-	return 0;
-}
-
-// Remove a tone from the tones array
-uint8_t remove_tone (uint8_t note) {
-	tones [0].duration = hertz_to_systicks (notes [note]);
-	tones [0].power = 0;
-	return 0;
-}
-
-// Play any tones in the array
-void play_tones () {
-
-}
-
-
-
-- 
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